Research output per year
Research output per year
- 19 results
Search results
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2017
Method, Apparatus, Computer Program and System for Measuring Oscillatory Motion
Arvind, D. K. & Bates, A., 8 Aug 2017, Patent No. US 9724019Research output: Patent
Open Access -
2014
Switches and a Network of Switches
Coppola, A-M., Locatelli, R., Cardo, J. F., Cano Reyes, J. & Marin, J. F. D., 2014, IPC No. US 8825986 B2, Patent No. US 8825986 B2, Priority date 22 Nov 2010Research output: Patent
Open AccessFile -
2012
Software flow tracking using multiple threads
Nagarajan, V., Kim, H-S., Wu, Y. & Gupta, R., 27 Nov 2012, Patent No. US 8321840 B2Research output: Patent
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2008
Translating a simulation-target memory access to a simulation-host memory access
Topham, N. P., 1 May 2008, Patent No. WO 2008053160 A1Research output: Patent
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2007
Systolic-array based systems and methods for performing block matching in motion compensation
Topham, N., 1 Mar 2007, Patent No. US 20070071101 A1Research output: Patent
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Architecture for microprocessor-based systems including simd processing unit and associated systems and methods
Wong, K-L., Graham, C., Topham, N., Jones, S., Aristodemou, A., Nemouchi, Y. & Lim, S. C., 2007, IPC No. WO 2007049150, Priority date 28 Sept 2005Research output: Patent
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Parameterizable clip instruction and method of performing a clip operation using the same
Topham, N., Nemouchi, Y., Jones, S., Graham, C., Wong, K-L. & Aristodemou, A., 2007, Patent No. 20070074007, Priority date 28 Sept 2005Research output: Patent
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2006
Processor Adapted to Receive Different Instruction Sets
Topham, N., 2006, Patent No. US patent no. 7,130,989Research output: Patent
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Processor and method for generating and storing compressed instructions in a program memory and decompressed instructions in an instruction cache wherein the decompressed instructions are assigned imaginary addresses derived from information stored in the program memory with the compressed instructions
Topham, N., 2006, Patent No. US patent no. 7,124,279Research output: Patent
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2005
Barrel shifter for a microprocessor
Wong, K. L. & Topham, N., 1 Dec 2005, Patent No. US 20050289323 A1Research output: Patent
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Systems and methods for performing branch prediction in a variable length instruction set microprocessor
Wong, K. L., Hakewill, J., Topham, N. & Fuhler, R., 1 Dec 2005, Patent No. US 20050278517 A1Research output: Patent
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Early resolving instructions
Joyce, N. & Topham, N., 1 Feb 2005, Patent No. US 20050033941 A1Research output: Patent
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Predicated Execution of Instructions in Processors
Topham, N., 2005, Patent No. US patent no. 6,944,853Research output: Patent
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2004
Mapping circuitry and method comprising first and second candidate output value producing units, an in-range value determining unit, and an output value selection unit
Topham, N., 2004, Patent No. US patent no. 6,754,806Research output: Patent
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Renaming Registers to Values Produced by Instructions According to Assigned Produce Sequence Number
Topham, N., 2004, Patent No. US patent no. 6,826,677Research output: Patent
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2002
Address translation
Topham, N. & Lim, S., 3 Oct 2002, Patent No. US20020144078 A1, Priority date 30 Mar 2001Research output: Patent
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Handling of loops in processors
Topham, N. & Livesley, R., 1 Oct 2002, Patent No. US 20020144092 A1Research output: Patent