3um Pitch, 1um Active Diameter SPAD Arrays in 130nm CMOS Imaging Technology

Ziyang you; Luca Parmesan; Sara Pellegrini; Robert Henderson

3um Pitch, 1um Active Diameter SPAD Arrays in 130nm CMOS Imaging Technology

Ziyang you, Luca Parmesan, Sara Pellegrini, Robert Henderson

School of Engineering

Research output: Contribution to conference › Paper › peer-review

Abstract / Description of output

A shared well 4x4 SPAD array test structure with
3um pitch is realized in a 130nm CMOS image sensor technology.
The SPADs have 150Hz median DCR at room temperature at 1V
excess bias, 15% peak PDP and 176ps FWHM timing jitter both
at 3V excess bias.

Original language	English
Number of pages	4
Publication status	Published - 2 Jun 2017
Event	International Image Sensor Workshop 2017 - Hiroshima, Japan Duration: 30 May 2017 → 2 Jun 2017

Workshop

Workshop	International Image Sensor Workshop 2017
Abbreviated title	IISW 2017
Country/Territory	Japan
City	Hiroshima
Period	30/05/17 → 2/06/17

Access to Document

HendersonIISW2017final

TOTALPHOTON: A Total Photon Camera for Molecular Imaging of Live Cells
Henderson, R.
EU government bodies
1/02/14 → 31/01/19
Project: Research
UPVLC: Ultra-parallel visible light communications (UP-VLC)
Haas, H. & Henderson, R.
Other
1/10/12 → 28/02/17
Project: Research

Cite this

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title = "3um Pitch, 1um Active Diameter SPAD Arrays in 130nm CMOS Imaging Technology",

abstract = "A shared well 4x4 SPAD array test structure with3um pitch is realized in a 130nm CMOS image sensor technology.The SPADs have 150Hz median DCR at room temperature at 1Vexcess bias, 15% peak PDP and 176ps FWHM timing jitter bothat 3V excess bias.",

author = "Ziyang you and Luca Parmesan and Sara Pellegrini and Robert Henderson",

year = "2017",

month = jun,

day = "2",

language = "English",

note = "International Image Sensor Workshop 2017, IISW 2017 ; Conference date: 30-05-2017 Through 02-06-2017",

}

TY - CONF

T1 - 3um Pitch, 1um Active Diameter SPAD Arrays in 130nm CMOS Imaging Technology

AU - you, Ziyang

AU - Parmesan, Luca

AU - Pellegrini, Sara

AU - Henderson, Robert

PY - 2017/6/2

Y1 - 2017/6/2

N2 - A shared well 4x4 SPAD array test structure with3um pitch is realized in a 130nm CMOS image sensor technology.The SPADs have 150Hz median DCR at room temperature at 1Vexcess bias, 15% peak PDP and 176ps FWHM timing jitter bothat 3V excess bias.

AB - A shared well 4x4 SPAD array test structure with3um pitch is realized in a 130nm CMOS image sensor technology.The SPADs have 150Hz median DCR at room temperature at 1Vexcess bias, 15% peak PDP and 176ps FWHM timing jitter bothat 3V excess bias.

M3 - Paper

T2 - International Image Sensor Workshop 2017

Y2 - 30 May 2017 through 2 June 2017

ER -

3um Pitch, 1um Active Diameter SPAD Arrays in 130nm CMOS Imaging Technology

Abstract / Description of output

Workshop

Access to Document

Fingerprint

Projects

TOTALPHOTON: A Total Photon Camera for Molecular Imaging of Live Cells

UPVLC: Ultra-parallel visible light communications (UP-VLC)

Cite this