Projects per year
An ultra-compact 1.4mm×1.4mm, 128×120 SPAD image sensor with a 5-wire interface is designed for time-resolved fluorescence microendoscopy. Dynamic range (DR) is extended by noiseless frame summation in SRAM attaining 126dB time resolved imaging at 15fps with 390ps gating resolution. The sensor SoC is implemented in STMicroelectronics 40nm/90nm 3D-stacked BSI CMOS process with 8μm pixels and 45% fill factor.
|Title of host publication||Symposium on VLSI Circuits|
|Publication status||Published - 29 Jul 2019|
|Event||VLSI Circuits Symposium - Kyoto, Japan|
Duration: 9 Jun 2019 → 14 Jun 2019
|Conference||VLSI Circuits Symposium|
|Period||9/06/19 → 14/06/19|
FingerprintDive into the research topics of 'A 128×120 5-Wire 1.96mm2 40nm/90nm 3D Stacked SPAD Time Resolved Image Sensor SoC for Microendoscopy'. Together they form a unique fingerprint.
- 1 Finished
1/10/13 → 31/03/19