A 128×120 5-Wire 1.96mm2 40nm/90nm 3D Stacked SPAD Time Resolved Image Sensor SoC for Microendoscopy

Tarek Al Abbas, Oscar Almer, Samuel Hutchings, Ahmet Erdogan, Istvan Gyongy, Neale Dutton, Robert Henderson

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

An ultra-compact 1.4mm×1.4mm, 128×120 SPAD image sensor with a 5-wire interface is designed for time-resolved fluorescence microendoscopy. Dynamic range (DR) is extended by noiseless frame summation in SRAM attaining 126dB time resolved imaging at 15fps with 390ps gating resolution. The sensor SoC is implemented in STMicroelectronics 40nm/90nm 3D-stacked BSI CMOS process with 8μm pixels and 45% fill factor.
Original languageEnglish
Title of host publicationSymposium on VLSI Circuits
PublisherIEEE Xplore
ISBN (Electronic)978-4-86348-720-8
ISBN (Print)978-1-7281-0914-5
DOIs
Publication statusPublished - 29 Jul 2019
EventVLSI Circuits Symposium - Kyoto, Japan
Duration: 9 Jun 201914 Jun 2019

Conference

ConferenceVLSI Circuits Symposium
Abbreviated titleVLSIC
Country/TerritoryJapan
CityKyoto
Period9/06/1914/06/19

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