Projects per year
Abstract
A 192 × 128 pixel single photon avalanche diode (SPAD) time-resolved single photon counting (TCSPC) image sensor is implemented in STMicroelectronics 40-nm CMOS technology. The 13% fill factor, 18.4 μm × 9.2 μm pixel contains a 33-ps resolution, 135-ns full scale, 12-bit time-to-digital converter (TDC) with 0.9-LSB differential and 5.64-LSB integral nonlinearity (DNL/INL). The sensor achieves a mean 219-ps fullwidth half-maximum (FWHM) impulse response function (IRF) and is operable at up to 18.6 kframes/s through 64 parallelized serial outputs. Cylindrical microlenses with a concentration factor of 3.25 increase the fill factor to 42%. The median dark count rate (DCR) is 25 Hz at 1.5-V excess bias. A digital calibration scheme integrated into a column of the imager allows off-chip digital process, voltage, and temperature (PVT) compensation of every frame on the fly. Fluorescence lifetime imaging microscopy (FLIM) results are presented.
Original language | English |
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Pages (from-to) | 1907-1916 |
Number of pages | 10 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 54 |
Issue number | 7 |
Early online date | 3 Apr 2019 |
DOIs | |
Publication status | Published - 31 Jul 2019 |
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Dive into the research topics of 'A 192×128 Time Correlated SPAD Image Sensor in 40-nm CMOS Technology'. Together they form a unique fingerprint.Projects
- 3 Finished
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PhD Student Support- as part of the UoE/STMicroelectronic Research Collaboration
UK industry, commerce and public corporations
1/01/11 → 29/02/20
Project: Research
Profiles
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Robert Henderson
- School of Engineering - Personal Chair of Electronic Imaging
Person: Academic: Research Active