A circuit-level implementation of fast, energy-efficient CMOS comparators for high-performance microprocessors

O. Ergin, K. Ghose, G. Kucuk, D. Ponomarev

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Datapath components in modem high performance superscalar processors employ a significant amount of associative addressing logic based on the use of comparators that dissipate energy on a mismatch. These comparators are used to detect a full match, but as mismatches are much more common than full matches in some components of the CPU, considerable energy-inefficiencies occur within the associative logic. We propose the design of two new comparator circuits that predominantly dissipate energy on a match, thus resulting in very significant savings in comparator power dissipation. The proposed designs are evaluated using SPICE simulations of actual VLSI layouts of the comparators in 0.18 micron 6-metal layer process and micro-architectural level statistics.
Original languageEnglish
Title of host publicationComputer Design: VLSI in Computers and Processors, 2002. Proceedings. 2002 IEEE International Conference on
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages118-121
Number of pages4
ISBN (Print)0-7695-1700-5
DOIs
Publication statusPublished - 2002

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