A CMOS mini-SiPM detector with in-pixel data compression for PET applications

Leo H. C. Braga; Lucio Pancheri; Leonardo Gasparini; Matteo Perenzoni; Richard Walker; Robert Henderson; David Stoppa

doi:10.1109/NSSMIC.2011.6154110

A CMOS mini-SiPM detector with in-pixel data compression for PET applications

Leo H. C. Braga, Lucio Pancheri, Leonardo Gasparini, Matteo Perenzoni, Richard Walker, Robert Henderson, David Stoppa

School of Engineering

Research output: Contribution to conference › Paper › peer-review

Abstract / Description of output

A new architecture for PET photodetectors based on small-area SiPMs (mini-SiPMs) with individual SPAD digitization and in-pixel data compression is presented. The main goal of this architecture is to reduce the electronics area occupation per SPAD and thus improve the fill factor. Two compression schemes are described, spatial and temporal compression, and a combination of both is implemented in the pixel. Our first chip using this architecture is described, where each pixel contains a mini-SiPM with 32 SPADs, a 4-bit digital counter and individual SPAD SRAMs for disabling high DCR devices. The sensor contains a 14 × 10 pixel array for a total of 4480 SPADs, and the achieved fill factor is about 29%. The sensor also contains column-level TDCs, which acquire the time of arrival of the first photon in each column. The expected compression response of this sensor is presented.

Original language	English
DOIs	https://doi.org/10.1109/NSSMIC.2011.6154110
Publication status	Published - 23 Oct 2011
Event	IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC) - Valencia, Spain Duration: 23 Oct 2011 → 29 Oct 2011

Conference

Conference	IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)
Country/Territory	Spain
City	Valencia
Period	23/10/11 → 29/10/11

Access to Document

10.1109/NSSMIC.2011.6154110

http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6154110

SPADNET
Henderson, R.
EU government bodies
1/07/10 → 31/12/14
Project: Research

Cite this

@conference{4e6b97c7deab4c8ca8230c44c3326cc0,

title = "A CMOS mini-SiPM detector with in-pixel data compression for PET applications",

abstract = "A new architecture for PET photodetectors based on small-area SiPMs (mini-SiPMs) with individual SPAD digitization and in-pixel data compression is presented. The main goal of this architecture is to reduce the electronics area occupation per SPAD and thus improve the fill factor. Two compression schemes are described, spatial and temporal compression, and a combination of both is implemented in the pixel. Our first chip using this architecture is described, where each pixel contains a mini-SiPM with 32 SPADs, a 4-bit digital counter and individual SPAD SRAMs for disabling high DCR devices. The sensor contains a 14 × 10 pixel array for a total of 4480 SPADs, and the achieved fill factor is about 29%. The sensor also contains column-level TDCs, which acquire the time of arrival of the first photon in each column. The expected compression response of this sensor is presented.",

author = "{H. C. Braga}, Leo and Lucio Pancheri and Leonardo Gasparini and Matteo Perenzoni and Richard Walker and Robert Henderson and David Stoppa",

year = "2011",

month = oct,

day = "23",

doi = "10.1109/NSSMIC.2011.6154110",

language = "English",

note = "IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC) ; Conference date: 23-10-2011 Through 29-10-2011",

}

TY - CONF

T1 - A CMOS mini-SiPM detector with in-pixel data compression for PET applications

AU - H. C. Braga, Leo

AU - Pancheri, Lucio

AU - Gasparini, Leonardo

AU - Perenzoni, Matteo

AU - Walker, Richard

AU - Henderson, Robert

AU - Stoppa, David

PY - 2011/10/23

Y1 - 2011/10/23

N2 - A new architecture for PET photodetectors based on small-area SiPMs (mini-SiPMs) with individual SPAD digitization and in-pixel data compression is presented. The main goal of this architecture is to reduce the electronics area occupation per SPAD and thus improve the fill factor. Two compression schemes are described, spatial and temporal compression, and a combination of both is implemented in the pixel. Our first chip using this architecture is described, where each pixel contains a mini-SiPM with 32 SPADs, a 4-bit digital counter and individual SPAD SRAMs for disabling high DCR devices. The sensor contains a 14 × 10 pixel array for a total of 4480 SPADs, and the achieved fill factor is about 29%. The sensor also contains column-level TDCs, which acquire the time of arrival of the first photon in each column. The expected compression response of this sensor is presented.

AB - A new architecture for PET photodetectors based on small-area SiPMs (mini-SiPMs) with individual SPAD digitization and in-pixel data compression is presented. The main goal of this architecture is to reduce the electronics area occupation per SPAD and thus improve the fill factor. Two compression schemes are described, spatial and temporal compression, and a combination of both is implemented in the pixel. Our first chip using this architecture is described, where each pixel contains a mini-SiPM with 32 SPADs, a 4-bit digital counter and individual SPAD SRAMs for disabling high DCR devices. The sensor contains a 14 × 10 pixel array for a total of 4480 SPADs, and the achieved fill factor is about 29%. The sensor also contains column-level TDCs, which acquire the time of arrival of the first photon in each column. The expected compression response of this sensor is presented.

U2 - 10.1109/NSSMIC.2011.6154110

DO - 10.1109/NSSMIC.2011.6154110

M3 - Paper

T2 - IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)

Y2 - 23 October 2011 through 29 October 2011

ER -

A CMOS mini-SiPM detector with in-pixel data compression for PET applications

Abstract / Description of output

Conference

Access to Document

Fingerprint

Projects

SPADNET

Cite this