A combined coefficient segmentation and block processing algorithm for low power implementation of FIR digital filters

Research output: Contribution to journal › Article › peer-review

Original language	Undefined/Unknown
Pages (from-to)	529-535
Number of pages	7
Journal	VLSI Design: An International Journal of Custom-Chip Design, Simulation, and Testing
Volume	15
Publication status	Published - 2002

Cite this

@article{b89913a3cc7e41819d1b9c6c8ec0af70,

title = "A combined coefficient segmentation and block processing algorithm for low power implementation of FIR digital filters",

author = "Erdogan, {A. T.} and Tughrul Arslan",

year = "2002",

language = "Undefined/Unknown",

volume = "15",

pages = "529--535",

journal = "VLSI Design: An International Journal of Custom-Chip Design, Simulation, and Testing",

}

TY - JOUR

T1 - A combined coefficient segmentation and block processing algorithm for low power implementation of FIR digital filters

AU - Erdogan, A. T.

AU - Arslan, Tughrul

PY - 2002

Y1 - 2002

M3 - Article

VL - 15

SP - 529

EP - 535

JO - VLSI Design: An International Journal of Custom-Chip Design, Simulation, and Testing

JF - VLSI Design: An International Journal of Custom-Chip Design, Simulation, and Testing

ER -