A compact Verilog-A ReRAM switching model

Ioannis Messaris, Alex Serb, Ali Khiat, Spyridon Nikolaidis, Themis Prodromakis

Research output: Working paperPreprint

Abstract / Description of output

The translation of emerging application concepts that exploit Resistive Random Access Memory (ReRAM) into large-scale practical systems requires realistic, yet computationally efficient, empirical models that can capture all observed physical devices. Here, we present a Verilog-A ReRAM model built upon experimental routines performed on TiOx-based prototypes. This model was based on custom biasing protocols, specifically designed to reveal device switching rate dependencies on a) bias voltage and b) initial resistive state. Our model is based on the assumption that a stationary switching rate surface m(R,v) exists for sufficiently low voltage stimulation. The proposed model comes in compact form as it is expressed by a simple voltage dependent exponential function multiplied with a voltage and initial resistive state dependent second order polynomial expression, which makes it suitable for fast and/or large-scale simulations.
Original languageUndefined/Unknown
Publication statusPublished - 3 Mar 2017

Cite this