A Compiler Framework for Automatically Mapping Data Parallel Programs to Heterogeneous MPSoCs

Kiran Chandramohan, Michael F. P. O'Boyle

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract / Description of output

Many of today's embedded devices are based on MultiProcessor System-on-Chips(MPSoCs). Such devices are usually heterogeneous, containing DSPs and specialized accelerators as well as one or more CPUs. This heterogeneity allows efficient implementations in specialized domains but is a barrier to their wider use. They are difficult to program as only the CPU is directly exposed to the programmer with access to other resources restricted to narrow library interfaces. This paper enables the exploitation of heterogeneous resources from a high level parallel programming model. It presents an LLVM based compiler that maps OpenMP programs to the underlying heterogeneous cores using an SPMD model of computation. It partitions data and computation across the cores, managing synchronization and memory coherence across different memory domains and operating systems. We evaluate its performance on the OMAP4 MPSoC on a range of data parallel benchmarks. On average it gives a 2.75x speedup over using the low-level library approach. Furthermore, it gives a speedup of 1.38x and an improved energy efficiency of 1.4x over using the two A9 cores alone.
Original languageEnglish
Title of host publicationProceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems
Place of PublicationNew York, NY, USA
Number of pages10
ISBN (Print)978-1-4503-3050-3
Publication statusPublished - 2014

Keywords / Materials (for Non-textual outputs)

  • SPMD, compiler, data-parallel, heterogeneous processors


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