Many of today's embedded devices are based on MultiProcessor System-on-Chips(MPSoCs). Such devices are usually heterogeneous, containing DSPs and specialized accelerators as well as one or more CPUs. This heterogeneity allows efficient implementations in specialized domains but is a barrier to their wider use. They are difficult to program as only the CPU is directly exposed to the programmer with access to other resources restricted to narrow library interfaces. This paper enables the exploitation of heterogeneous resources from a high level parallel programming model. It presents an LLVM based compiler that maps OpenMP programs to the underlying heterogeneous cores using an SPMD model of computation. It partitions data and computation across the cores, managing synchronization and memory coherence across different memory domains and operating systems. We evaluate its performance on the OMAP4 MPSoC on a range of data parallel benchmarks. On average it gives a 2.75x speedup over using the low-level library approach. Furthermore, it gives a speedup of 1.38x and an improved energy efficiency of 1.4x over using the two A9 cores alone.
|Title of host publication||Proceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems|
|Place of Publication||New York, NY, USA|
|Number of pages||10|
|Publication status||Published - 2014|
- SPMD, compiler, data-parallel, heterogeneous processors