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Abstract / Description of output
A dual-junction single-photon avalanche diode
(SPAD) structure is reported in a 130nm low-voltage CMOS
technology. The device comprises two stacked avalanche
multiplication regions with virtual guard ring constructions. A
8.6mm diameter p-well is placed within a 12.3mm diameter deep nwell.
At 3V excess bias, the junctions operate with median dark
count rates (DCR) of 10kHz and 5kHz, photon detection
efficiencies (PDE) of 32% at 450nm and 29% at 670nm
respectively. We demonstrate that the junction at which a photon
is detected can be uniquely distinguished by the dead time of the
Geiger mode pulse allowing spectral discrimination by simple
digital circuitry.
(SPAD) structure is reported in a 130nm low-voltage CMOS
technology. The device comprises two stacked avalanche
multiplication regions with virtual guard ring constructions. A
8.6mm diameter p-well is placed within a 12.3mm diameter deep nwell.
At 3V excess bias, the junctions operate with median dark
count rates (DCR) of 10kHz and 5kHz, photon detection
efficiencies (PDE) of 32% at 450nm and 29% at 670nm
respectively. We demonstrate that the junction at which a photon
is detected can be uniquely distinguished by the dead time of the
Geiger mode pulse allowing spectral discrimination by simple
digital circuitry.
Original language | English |
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Pages (from-to) | 429-431 |
Number of pages | 3 |
Journal | IEEE Electron Device Letters |
Volume | 34 |
Issue number | 3 |
Publication status | Published - Mar 2013 |
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Dive into the research topics of 'A Dual-Junction Single-Photon Avalanche Diode in 130nm CMOS Technology'. Together they form a unique fingerprint.Projects
- 1 Finished
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PhD Student Support- as part of the UoE/STMicroelectronic Research Collaboration
UK industry, commerce and public corporations
1/01/11 → 29/02/20
Project: Research