A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-chip Buses

Z. Khan; Tughrul Arslan; A. T. Erdogan; E. Macii; V. Paliouras; O. Koufopavlou

doi:10.1007/978-3-540-30205-6_60

A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-chip Buses

Z. Khan, Tughrul Arslan, A. T. Erdogan, E. Macii, V. Paliouras, O. Koufopavlou

School of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Chapter (peer-reviewed) › peer-review

Original language	English
Title of host publication	Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Subtitle of host publication	14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004. Proceedings
Pages	585-592
Number of pages	8
DOIs	https://doi.org/10.1007/978-3-540-30205-6_60
Publication status	Published - 2004

Publication series

Name	Lecture Notes in Computer Science
Volume	3254
ISSN (Print)	0302-9743

Access to Document

10.1007/978-3-540-30205-6_60

Cite this

Khan, Z., Arslan, T., Erdogan, A. T., Macii, E., Paliouras, V., & Koufopavlou, O. (2004). A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-chip Buses. In Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation: 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004. Proceedings (pp. 585-592). (Lecture Notes in Computer Science; Vol. 3254). https://doi.org/10.1007/978-3-540-30205-6_60

Khan, Z. ; Arslan, Tughrul ; Erdogan, A. T. et al. / A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-chip Buses. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation: 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004. Proceedings. 2004. pp. 585-592 (Lecture Notes in Computer Science).

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title = "A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-chip Buses",

author = "Z. Khan and Tughrul Arslan and Erdogan, {A. T.} and E. Macii and V. Paliouras and O. Koufopavlou",

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language = "English",

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Khan, Z, Arslan, T, Erdogan, AT, Macii, E, Paliouras, V & Koufopavlou, O 2004, A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-chip Buses. in Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation: 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004. Proceedings. Lecture Notes in Computer Science, vol. 3254, pp. 585-592. https://doi.org/10.1007/978-3-540-30205-6_60

A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-chip Buses. / Khan, Z.; Arslan, Tughrul; Erdogan, A. T. et al.
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation: 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004. Proceedings. 2004. p. 585-592 (Lecture Notes in Computer Science; Vol. 3254).

Research output: Chapter in Book/Report/Conference proceeding › Chapter (peer-reviewed) › peer-review

TY - CHAP

T1 - A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-chip Buses

AU - Khan, Z.

AU - Arslan, Tughrul

AU - Erdogan, A. T.

AU - Macii, E.

AU - Paliouras, V.

AU - Koufopavlou, O.

PY - 2004

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DO - 10.1007/978-3-540-30205-6_60

M3 - Chapter (peer-reviewed)

SN - 978-3-540-23095-3

T3 - Lecture Notes in Computer Science

SP - 585

EP - 592

BT - Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

ER -

Khan Z, Arslan T, Erdogan AT, Macii E, Paliouras V, Koufopavlou O. A Dual Low Power and Crosstalk Immune Encoding Scheme for System-on-chip Buses. In Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation: 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004. Proceedings. 2004. p. 585-592. (Lecture Notes in Computer Science). doi: 10.1007/978-3-540-30205-6_60