A Gate Modulated Avalanche Bipolar Transistor in 130nm CMOS Technology

Robert Henderson, E.A.G. Webster, Richard Walker

Research output: Contribution to conferencePaperpeer-review

Abstract

A novel Geiger-mode avalanche bipolar transistor
structure is realized in a 130nm, low-voltage CMOS technology.
A MOS transistor formed within the base region of the device
allows gate modulation of the output pulse rate. In bipolar
operation, the device generates Poisson-distributed digital
output pulses at rates from 1kHz to 20MHz, linearly related to
emitter currents in the range 10nA to 1μA. In MOS operation,
the mean pulse rate varies exponentially over 4-5 decades as the
gate voltage changes by 300mV and consumes less than 180μA
drain-source current. The gate input eliminates the input
current of the avalanche bipolar transistor, enabling capacitive
sensor interfaces and direct device-level, analogue-digital
conversion. The device is fully compatible with low-voltage
CMOS circuits and standard digital process steps.
Original languageEnglish
Pages226-229
Number of pages4
DOIs
Publication statusPublished - Sep 2012
EventEuropean Solid-State Device Research Conference - Bordeaux, France
Duration: 17 Sep 201221 Sep 2012

Conference

ConferenceEuropean Solid-State Device Research Conference
Country/TerritoryFrance
CityBordeaux
Period17/09/1221/09/12

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