A Genetic Algorithm for Multiple Fault Model Test Generation for Combinational VLSI Circuits

T. Arslan, M. O'Dare

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageUndefined/Unknown
Title of host publicationSecond IEE/IEEE International Conference on Genetic Algorithms in Engineering Systems: Innovations and Applications
Pages5
Number of pages1
Publication statusPublished - 1997

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