A Genetic Algorithm for Multiple Fault Model Test Generation for Combinational VLSI Circuits

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Original language	Undefined/Unknown
Title of host publication	Second IEE/IEEE International Conference on Genetic Algorithms in Engineering Systems: Innovations and Applications
Pages	5
Number of pages	1
Publication status	Published - 1997

Cite this

@inproceedings{2b9c17b2bb644a19a389a2cea9140980,

title = "A Genetic Algorithm for Multiple Fault Model Test Generation for Combinational VLSI Circuits",

author = "T. Arslan and M. O'Dare",

year = "1997",

language = "Undefined/Unknown",

pages = "5",

booktitle = "Second IEE/IEEE International Conference on Genetic Algorithms in Engineering Systems: Innovations and Applications",

}