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Abstract / Description of output
A single-photon avalanche diode (SPAD) is reported in a 130-nm CMOS imaging process which achieves a peak photon detection efficiency (PDE) of ≈72% at 560 nm with >; 40% PDE from 410 to 760 nm. This is achieved by eliminating junction isolation, utilizing dielectric stack optimizations designed for CMOS imaging, and operating at high bias enabled by ac coupling. The 8-μm-diameter device achieves a low median dark count rate of 18 Hz at 2-V excess bias (VEB), a <; 60-ps FWHM timing resolution at 654 nm from VEB = 6 V to VEB = 12 V, and a <; 4% after-pulsing probability. This represents performance which is comparable to fully customized discrete SPADs.
Original language | English |
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Pages (from-to) | 1589-1591 |
Number of pages | 3 |
Journal | IEEE Electron Device Letters |
Volume | 33 |
Issue number | 11 |
DOIs | |
Publication status | Published - Nov 2012 |
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Dive into the research topics of 'A High-Performance Single-Photon Avalanche Diode in 130-nm CMOS Imaging Technology'. Together they form a unique fingerprint.Projects
- 1 Finished
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PhD Student Support- as part of the UoE/STMicroelectronic Research Collaboration
UK industry, commerce and public corporations
1/01/11 → 29/02/20
Project: Research