A NOVEL HIGH-EFFICIENCY PARTIAL-PARALLEL CONTEXT MODELING ARCHITECTURE FOR EBCOT IN JPEG2000

Xin Zhao; Ahmet T. Erdogan; Tughrul Arslan

A NOVEL HIGH-EFFICIENCY PARTIAL-PARALLEL CONTEXT MODELING ARCHITECTURE FOR EBCOT IN JPEG2000

Xin Zhao^*, Ahmet T. Erdogan, Tughrul Arslan

^*Corresponding author for this work

School of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract / Description of output

In this paper, we present a novel Context Modeling (CM) architecture used in JPEG2000 encoder targeting next generation of cameras. The implementation is based on a newly emerging coarse-grained Dynamically Reconfigurable (DR) processor. A novel partial parallel architecture for the CM is introduced which can be easily tailored for the target DR processor in order to achieve higher performance results. Simulation results show that the resulting architecture provides throughput reaching up to 60.82MS/s, representing 1.2x speed up compared to previous parallel CM architectures.

Original language	English
Title of host publication	IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS
Editors	S Sezer, A Marshall, T Buechner
Place of Publication	NEW YORK
Publisher	Institute of Electrical and Electronics Engineers
Pages	57-60
Number of pages	4
ISBN (Print)	978-1-4244-5220-0
Publication status	Published - 2009
Event	IEEE International SOC Conference - Belfast, United Kingdom Duration: 9 Sept 2009 → 11 Sept 2009

Publication series

Name	IEEE International SOC Conference
Publisher	IEEE

Conference

Conference	IEEE International SOC Conference
Country/Territory	United Kingdom
Period	9/09/09 → 11/09/09

Cite this

@inproceedings{0bcb6c7177ce47fa95cef7fd1d82bbec,

title = "A NOVEL HIGH-EFFICIENCY PARTIAL-PARALLEL CONTEXT MODELING ARCHITECTURE FOR EBCOT IN JPEG2000",

abstract = "In this paper, we present a novel Context Modeling (CM) architecture used in JPEG2000 encoder targeting next generation of cameras. The implementation is based on a newly emerging coarse-grained Dynamically Reconfigurable (DR) processor. A novel partial parallel architecture for the CM is introduced which can be easily tailored for the target DR processor in order to achieve higher performance results. Simulation results show that the resulting architecture provides throughput reaching up to 60.82MS/s, representing 1.2x speed up compared to previous parallel CM architectures.",

author = "Xin Zhao and Erdogan, {Ahmet T.} and Tughrul Arslan",

year = "2009",

language = "English",

isbn = "978-1-4244-5220-0",

series = "IEEE International SOC Conference",

publisher = "Institute of Electrical and Electronics Engineers",

pages = "57--60",

editor = "S Sezer and A Marshall and T Buechner",

booktitle = "IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS",

address = "United States",

note = "IEEE International SOC Conference ; Conference date: 09-09-2009 Through 11-09-2009",

}

Zhao, X, Erdogan, AT & Arslan, T 2009, A NOVEL HIGH-EFFICIENCY PARTIAL-PARALLEL CONTEXT MODELING ARCHITECTURE FOR EBCOT IN JPEG2000. in S Sezer, A Marshall & T Buechner (eds), IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS. IEEE International SOC Conference, Institute of Electrical and Electronics Engineers, NEW YORK, pp. 57-60, IEEE International SOC Conference, United Kingdom, 9/09/09.

A NOVEL HIGH-EFFICIENCY PARTIAL-PARALLEL CONTEXT MODELING ARCHITECTURE FOR EBCOT IN JPEG2000. / Zhao, Xin; Erdogan, Ahmet T.; Arslan, Tughrul.
IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS. ed. / S Sezer; A Marshall; T Buechner. NEW YORK: Institute of Electrical and Electronics Engineers, 2009. p. 57-60 (IEEE International SOC Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - A NOVEL HIGH-EFFICIENCY PARTIAL-PARALLEL CONTEXT MODELING ARCHITECTURE FOR EBCOT IN JPEG2000

AU - Zhao, Xin

AU - Erdogan, Ahmet T.

AU - Arslan, Tughrul

PY - 2009

Y1 - 2009

N2 - In this paper, we present a novel Context Modeling (CM) architecture used in JPEG2000 encoder targeting next generation of cameras. The implementation is based on a newly emerging coarse-grained Dynamically Reconfigurable (DR) processor. A novel partial parallel architecture for the CM is introduced which can be easily tailored for the target DR processor in order to achieve higher performance results. Simulation results show that the resulting architecture provides throughput reaching up to 60.82MS/s, representing 1.2x speed up compared to previous parallel CM architectures.

AB - In this paper, we present a novel Context Modeling (CM) architecture used in JPEG2000 encoder targeting next generation of cameras. The implementation is based on a newly emerging coarse-grained Dynamically Reconfigurable (DR) processor. A novel partial parallel architecture for the CM is introduced which can be easily tailored for the target DR processor in order to achieve higher performance results. Simulation results show that the resulting architecture provides throughput reaching up to 60.82MS/s, representing 1.2x speed up compared to previous parallel CM architectures.

M3 - Conference contribution

SN - 978-1-4244-5220-0

T3 - IEEE International SOC Conference

SP - 57

EP - 60

BT - IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS

A2 - Sezer, S

A2 - Marshall, A

A2 - Buechner, T

PB - Institute of Electrical and Electronics Engineers

CY - NEW YORK

T2 - IEEE International SOC Conference

Y2 - 9 September 2009 through 11 September 2009

ER -

A NOVEL HIGH-EFFICIENCY PARTIAL-PARALLEL CONTEXT MODELING ARCHITECTURE FOR EBCOT IN JPEG2000

Abstract / Description of output

Publication series

Conference

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Cite this