A Parallel 32x32 Time-To-Digital Converter Array Fabricated in a 130 nm Imaging CMOS Technology

M. Gersbach; Y. Maruyama; E. Labonne; R. Walker; Robert Henderson; F. Borghetti; D. Stoppa; E. Charbon

doi:10.1109/ESSCIRC.2009.5326021

A Parallel 32x32 Time-To-Digital Converter Array Fabricated in a 130 nm Imaging CMOS Technology

M. Gersbach, Y. Maruyama, E. Labonne, R. Walker, Robert Henderson, F. Borghetti, D. Stoppa, E. Charbon

School of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We report on the design and characterization of a 32 times 32 time-to-digital converter (TDC) array implemented in a 130 nm imaging CMOS technology. The 10-bit TDCs exhibit a timing resolution of 119 ps with a timing uniformity across the entire array of less than 2 LSBs. The differential- and integral non-linearity (DNL and INL) were measured at plusmn 0.4 and plusmn1.2 LSBs respectively. The TDC array was fabricated with a pitch of 50 mum in both directions and with a total TDC area of less than 2000 mum2. The characteristics of the array make it an excellent candidate for in-pixel TDC in time-resolved imagers for applications such as 3-D imaging and fluorescence lifetime imaging microscopy (FLIM).

Original language	English
Title of host publication	IEEE European Solid-State Circuits Conference (ESSCIRC)
Publisher	Institute of Electrical and Electronics Engineers (IEEE)
Pages	196 - 199
ISBN (Print)	978-1-4244-4354-3
DOIs	https://doi.org/10.1109/ESSCIRC.2009.5326021
Publication status	Published - 14 Sep 2009
Event	IEEE European Solid-State Circuits Conference (ESSCIRC) - Athens, Greece Duration: 14 Sep 2009 → 18 Sep 2009

Conference

Conference	IEEE European Solid-State Circuits Conference (ESSCIRC)
Country	Greece
City	Athens
Period	14/09/09 → 18/09/09

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10.1109/ESSCIRC.2009.5326021

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MEGAFRAME: MEGAFRAME: Million Frame Per Second, Time Correlated Single Photon Camera
Henderson, R. & Crain, J.
EU government bodies
1/06/06 → 30/04/10
Project: Research

Cite this

Gersbach, M., Maruyama, Y., Labonne, E., Walker, R., Henderson, R., Borghetti, F., Stoppa, D., & Charbon, E. (2009). A Parallel 32x32 Time-To-Digital Converter Array Fabricated in a 130 nm Imaging CMOS Technology. In IEEE European Solid-State Circuits Conference (ESSCIRC) (pp. 196 - 199). Institute of Electrical and Electronics Engineers (IEEE). https://doi.org/10.1109/ESSCIRC.2009.5326021

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abstract = "We report on the design and characterization of a 32 times 32 time-to-digital converter (TDC) array implemented in a 130 nm imaging CMOS technology. The 10-bit TDCs exhibit a timing resolution of 119 ps with a timing uniformity across the entire array of less than 2 LSBs. The differential- and integral non-linearity (DNL and INL) were measured at plusmn 0.4 and plusmn1.2 LSBs respectively. The TDC array was fabricated with a pitch of 50 mum in both directions and with a total TDC area of less than 2000 mum2. The characteristics of the array make it an excellent candidate for in-pixel TDC in time-resolved imagers for applications such as 3-D imaging and fluorescence lifetime imaging microscopy (FLIM).",

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Gersbach, M, Maruyama, Y, Labonne, E, Walker, R, Henderson, R, Borghetti, F, Stoppa, D & Charbon, E 2009, A Parallel 32x32 Time-To-Digital Converter Array Fabricated in a 130 nm Imaging CMOS Technology. in IEEE European Solid-State Circuits Conference (ESSCIRC). Institute of Electrical and Electronics Engineers (IEEE), pp. 196 - 199, IEEE European Solid-State Circuits Conference (ESSCIRC), Athens, Greece, 14/09/09. https://doi.org/10.1109/ESSCIRC.2009.5326021

A Parallel 32x32 Time-To-Digital Converter Array Fabricated in a 130 nm Imaging CMOS Technology. / Gersbach, M.; Maruyama, Y.; Labonne, E.; Walker, R.; Henderson, Robert; Borghetti, F.; Stoppa, D.; Charbon, E.

IEEE European Solid-State Circuits Conference (ESSCIRC). Institute of Electrical and Electronics Engineers (IEEE), 2009. p. 196 - 199.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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A Parallel 32x32 Time-To-Digital Converter Array Fabricated in a 130 nm Imaging CMOS Technology

Abstract

Conference

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MEGAFRAME: MEGAFRAME: Million Frame Per Second, Time Correlated Single Photon Camera

Cite this