A Predictive Model for Dynamic Microarchitectural Adaptivity Control

Christophe Dubach; Timothy M. Jones; Edwin V. Bonilla; Michael F.P. O'Boyle

doi:10.1109/MICRO.2010.14

A Predictive Model for Dynamic Microarchitectural Adaptivity Control

Christophe Dubach, Timothy M. Jones, Edwin V. Bonilla, Michael F.P. O'Boyle

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Adaptive micro architectures are a promising solution for designing high-performance, power-efficient microprocessors. They offer the ability to tailor computational resources to the specific requirements of different programs or program phases. They have the potential to adapt the hardware cost-effectively at runtime to any application's needs. However, one of the key challenges is how to dynamically determine the best architecture configuration at any given time, for any new workload. This paper proposes a novel control mechanism based on a predictive model for micro architectural adaptivity control. This model is able to efficiently control adaptivity by monitoring the behaviour of an application's different phases at runtime. We show that using this model on SPEC 2000, we double the energy/performance efficiency of the processor when compared to the best static configuration tuned for the whole benchmark suite. This represents 74% of the improvement available if we knew the best micro architecture for each program phase ahead of time. In addition, we show that the overheads associated with the implementation of our scheme have a negligible impact on performance and power.

Original language	English
Title of host publication	Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '43)
Place of Publication	Washington, DC, USA
Publisher	Institute of Electrical and Electronics Engineers
Pages	485-496
Number of pages	12
ISBN (Print)	978-1-4244-9071-4
DOIs	https://doi.org/10.1109/MICRO.2010.14
Publication status	Published - 2010

Publication series

Name	Micro -Annual Workshop then Annual International Symposium
ISSN (Print)	1072-4451

Access to Document

10.1109/MICRO.2010.14

http://dx.doi.org/10.1109/MICRO.2010.14

Cite this

Dubach, C., Jones, T. M., Bonilla, E. V., & O'Boyle, M. F. P. (2010). A Predictive Model for Dynamic Microarchitectural Adaptivity Control. In Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '43) (pp. 485-496). (Micro -Annual Workshop then Annual International Symposium). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/MICRO.2010.14

Dubach, Christophe ; Jones, Timothy M. ; Bonilla, Edwin V. et al. / A Predictive Model for Dynamic Microarchitectural Adaptivity Control. Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '43). Washington, DC, USA : Institute of Electrical and Electronics Engineers, 2010. pp. 485-496 (Micro -Annual Workshop then Annual International Symposium).

@inproceedings{509f12cd839a4bcc8c3262ee2b104613,

title = "A Predictive Model for Dynamic Microarchitectural Adaptivity Control",

abstract = "Adaptive micro architectures are a promising solution for designing high-performance, power-efficient microprocessors. They offer the ability to tailor computational resources to the specific requirements of different programs or program phases. They have the potential to adapt the hardware cost-effectively at runtime to any application's needs. However, one of the key challenges is how to dynamically determine the best architecture configuration at any given time, for any new workload. This paper proposes a novel control mechanism based on a predictive model for micro architectural adaptivity control. This model is able to efficiently control adaptivity by monitoring the behaviour of an application's different phases at runtime. We show that using this model on SPEC 2000, we double the energy/performance efficiency of the processor when compared to the best static configuration tuned for the whole benchmark suite. This represents 74% of the improvement available if we knew the best micro architecture for each program phase ahead of time. In addition, we show that the overheads associated with the implementation of our scheme have a negligible impact on performance and power.",

author = "Christophe Dubach and Jones, {Timothy M.} and Bonilla, {Edwin V.} and O'Boyle, {Michael F.P.}",

year = "2010",

doi = "10.1109/MICRO.2010.14",

language = "English",

isbn = "978-1-4244-9071-4",

series = "Micro -Annual Workshop then Annual International Symposium",

publisher = "Institute of Electrical and Electronics Engineers",

pages = "485--496",

booktitle = "Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '43)",

address = "United States",

}

Dubach, C, Jones, TM, Bonilla, EV & O'Boyle, MFP 2010, A Predictive Model for Dynamic Microarchitectural Adaptivity Control. in Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '43). Micro -Annual Workshop then Annual International Symposium, Institute of Electrical and Electronics Engineers, Washington, DC, USA, pp. 485-496. https://doi.org/10.1109/MICRO.2010.14

A Predictive Model for Dynamic Microarchitectural Adaptivity Control. / Dubach, Christophe; Jones, Timothy M.; Bonilla, Edwin V. et al.
Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '43). Washington, DC, USA: Institute of Electrical and Electronics Engineers, 2010. p. 485-496 (Micro -Annual Workshop then Annual International Symposium).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - A Predictive Model for Dynamic Microarchitectural Adaptivity Control

AU - Dubach, Christophe

AU - Jones, Timothy M.

AU - Bonilla, Edwin V.

AU - O'Boyle, Michael F.P.

PY - 2010

Y1 - 2010

N2 - Adaptive micro architectures are a promising solution for designing high-performance, power-efficient microprocessors. They offer the ability to tailor computational resources to the specific requirements of different programs or program phases. They have the potential to adapt the hardware cost-effectively at runtime to any application's needs. However, one of the key challenges is how to dynamically determine the best architecture configuration at any given time, for any new workload. This paper proposes a novel control mechanism based on a predictive model for micro architectural adaptivity control. This model is able to efficiently control adaptivity by monitoring the behaviour of an application's different phases at runtime. We show that using this model on SPEC 2000, we double the energy/performance efficiency of the processor when compared to the best static configuration tuned for the whole benchmark suite. This represents 74% of the improvement available if we knew the best micro architecture for each program phase ahead of time. In addition, we show that the overheads associated with the implementation of our scheme have a negligible impact on performance and power.

AB - Adaptive micro architectures are a promising solution for designing high-performance, power-efficient microprocessors. They offer the ability to tailor computational resources to the specific requirements of different programs or program phases. They have the potential to adapt the hardware cost-effectively at runtime to any application's needs. However, one of the key challenges is how to dynamically determine the best architecture configuration at any given time, for any new workload. This paper proposes a novel control mechanism based on a predictive model for micro architectural adaptivity control. This model is able to efficiently control adaptivity by monitoring the behaviour of an application's different phases at runtime. We show that using this model on SPEC 2000, we double the energy/performance efficiency of the processor when compared to the best static configuration tuned for the whole benchmark suite. This represents 74% of the improvement available if we knew the best micro architecture for each program phase ahead of time. In addition, we show that the overheads associated with the implementation of our scheme have a negligible impact on performance and power.

UR - http://www.scopus.com/inward/record.url?scp=79951697270&partnerID=8YFLogxK

U2 - 10.1109/MICRO.2010.14

DO - 10.1109/MICRO.2010.14

M3 - Conference contribution

SN - 978-1-4244-9071-4

T3 - Micro -Annual Workshop then Annual International Symposium

SP - 485

EP - 496

BT - Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '43)

PB - Institute of Electrical and Electronics Engineers

CY - Washington, DC, USA

ER -

Dubach C, Jones TM, Bonilla EV, O'Boyle MFP. A Predictive Model for Dynamic Microarchitectural Adaptivity Control. In Proceedings of the 2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO '43). Washington, DC, USA: Institute of Electrical and Electronics Engineers. 2010. p. 485-496. (Micro -Annual Workshop then Annual International Symposium). doi: 10.1109/MICRO.2010.14

A Predictive Model for Dynamic Microarchitectural Adaptivity Control

Abstract

Publication series

Access to Document

Other files and links

Fingerprint

Cite this