A Reconfigurable 14-bit 60GPhoton/s Single-Photon Receiver for Visible Light Communications

Research output: Contribution to conferencePaperpeer-review

Abstract

A reconfigurable Single-Photon Avalanche Diode
integration mode receiver in 130nm CMOS is presented for
optical links with an array readout bandwidth of 100MHz. The
all-digital 32x32 SPAD array achieves a minimum dead time
of 5.9ns, and a median dark count rate of 2.5kHz per SPAD.
Pulse shortening increases the dynamic range by preventing pulse
overlap. An in-pixel feedback loop allows synchronous or selfclocked
asynchronous time division multiplexing. The internal
gain of SPADs and spatio-temporal summation removes the need
for analogue amplification. A maximum count rate of 58GHz is
observed, with SNR of 79dB, a sensitivity of -31.7dBm at 100MHz
and a BER of 10−9. The sensor core draws 89mW at maximum
count rate.
Original languageEnglish
Pages85-88
Number of pages4
Publication statusPublished - Sept 2012
EventEuropean Solid-State Circuits Conference - Bordeaux, France
Duration: 17 Sept 201221 Sept 2012

Conference

ConferenceEuropean Solid-State Circuits Conference
Country/TerritoryFrance
CityBordeaux
Period17/09/1221/09/12

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