A Reconfigurable 1GSps to 250MSps, 7-bit to 9-bit Highly Time-Interleaved Counter ADC in 0.13μm CMOS

S. Danesh, J. E. D. Hurwitz, K. M. Findlater, David Renshaw, Robert Henderson

Research output: Contribution to conferencePaperpeer-review

Original languageEnglish
Pages268-269
Number of pages2
Publication statusPublished - 15 Jun 2011
Event2011 Symposium on VLSI Circuits - , Japan
Duration: 15 Jun 201117 Jun 2011

Conference

Conference2011 Symposium on VLSI Circuits
Country/TerritoryJapan
Period15/06/1117/06/11

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