Abstract / Description of output
A 16×16 Silicon Photomultiplier (SiPM) is reported
in a 130nm CMOS imaging technology with a photon detection
probability of >30% from 450-750nm. The SiPM demonstrates a
21.6% fill factor with an 11.6μm pitch and 8μm diameter Single-
Photon Avalanche Diodes (SPADs). This is achieved using a
new SPAD structure with integrated resistor and capacitor.
NMOS-only pixel electronics are used to improve fill factor and
to implement an addressable array of SPADs that are isolated
from the array and column load. A 1T DRAM in each pixel is
implemented to inhibit the output of high dark count rate (DCR)
SPADs. The SiPM also achieves: a median DCR of ≈200Hz at
1.2V excess bias; low after pulsing; and a SPAD timing jitter of
≈95ps at 654nm with a column delay of ≈100-200ps.
in a 130nm CMOS imaging technology with a photon detection
probability of >30% from 450-750nm. The SiPM demonstrates a
21.6% fill factor with an 11.6μm pitch and 8μm diameter Single-
Photon Avalanche Diodes (SPADs). This is achieved using a
new SPAD structure with integrated resistor and capacitor.
NMOS-only pixel electronics are used to improve fill factor and
to implement an addressable array of SPADs that are isolated
from the array and column load. A 1T DRAM in each pixel is
implemented to inhibit the output of high dark count rate (DCR)
SPADs. The SiPM also achieves: a median DCR of ≈200Hz at
1.2V excess bias; low after pulsing; and a SPAD timing jitter of
≈95ps at 654nm with a column delay of ≈100-200ps.
Original language | English |
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Pages | 238-241 |
Number of pages | 4 |
DOIs | |
Publication status | Published - Sept 2012 |
Event | European Solid-State Device Research Conference - Bordeaux, France Duration: 17 Sept 2012 → 21 Sept 2012 |
Conference
Conference | European Solid-State Device Research Conference |
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Country/Territory | France |
City | Bordeaux |
Period | 17/09/12 → 21/09/12 |