A Six Level Gate-Driver Topology with 2.5 ns Resolution for Silicon Carbide MOSFET Active Gate Drive Development

Paul D. Judge, Ross Mathieson, Stephen Finney

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract / Description of output

This paper presents a new high-bandwidth multilevel gate-drive topology for use in Silicon Carbide (SiC) Active Gate-Driver Development. The presented Modular Multilevel gate Driver (MMGD) is a voltage modulated gate-driver topology that has a resolution of 2.5 ns and a current source/sink ability of approximately 5A, allowing for driving of high-power SiC MOSFETS. The MMGD is formed of off-the-shelf components, and so is readily reproducible. The speed of the gate-driver has been found to be fast enough to effectively PWM the gate of a high-power SiC MOSFET, allowing mutliple gate-driving strategies to be investigated. Experimental results using a 1.7 kV 300 A SiC MOSFET are given to validate the MMGDs ability to actively influence the switching behaviour of a high-power device.

Original languageEnglish
Title of host publication2021 IEEE 12th Energy Conversion Congress & Exposition - Asia (ECCE-Asia)
PublisherInstitute of Electrical and Electronics Engineers
Pages2133-2138
Number of pages6
ISBN (Electronic)9781728163444
DOIs
Publication statusE-pub ahead of print - 13 Jul 2021
Event12th IEEE Energy Conversion Congress and Exposition - Asia, ECCE Asia 2021 - Virtual, Singapore, Singapore
Duration: 24 May 202127 May 2021

Publication series

NameInternational Conference on Power Electronics (ICPE)
PublisherIEEE
Volume2021
ISSN (Print)2150-6078
ISSN (Electronic)2150-6086

Conference

Conference12th IEEE Energy Conversion Congress and Exposition - Asia, ECCE Asia 2021
Country/TerritorySingapore
CityVirtual, Singapore
Period24/05/2127/05/21

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