Adapting the columns of storage components for lower static energy dissipation

M. B. Aykenar, M. Ozgur, O. S. Simsek, O. Ergin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract / Description of output

SRAM arrays are used especially in memory structures inside the processor. Static energy dissipation caused by leakage currents is increasing with every new technology and large SRAM arrays are the main source of the leakage current. We analyzed the content distribution of columns of SRAM arrays and based on the majority of the content, the body-bias of transistors are changed to reduce the static energy dissipation of these SRAM arrays. Our simulations reveal that when our technique is used in the register file of the processor, the leakage energy dissipation decreases by 39% and the total energy dissipation by 14% with an area overhead of 11%.
Original languageEnglish
Title of host publicationVery Large Scale Integration (VLSI-SoC), 2013 IFIP/IEEE 21st International Conference on
Pages222-227
Number of pages6
DOIs
Publication statusPublished - 1 Oct 2013

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