Abstract / Description of output
We propose a System-on-Chip (SoC) architecture for reconfigurable applications based on the AMBA High-Speed Bus (AHB). The architecture features multiple low-area fly by DNA blocks for transferring configuration data. Furthermore, the architecture eliminates the use of energy-consuming instructions used in comparable commercial reconfigurable SoCs. The flyby DMA blocks achieve a reduction of up to 98% in the number of gates found in general-purpose DMA controllers. The DMA blocks also achieve the flyby throughput which halves the number of clock cycles used in conventional DMA for data transfer. We also demonstrate the presence of parallel processing which contributes to improved system performance of the proposed architecture over commercial comparatives.
Original language | English |
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Title of host publication | ASP-DAC 2005: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 |
Place of Publication | NEW YORK |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 1256-1259 |
Number of pages | 4 |
ISBN (Print) | 0-7803-8736-8 |
Publication status | Published - 2005 |
Event | 10th Asia and South Pacific Design Automation Conference - Shanghai Duration: 18 Jan 2005 → 21 Jan 2005 |
Conference
Conference | 10th Asia and South Pacific Design Automation Conference |
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City | Shanghai |
Period | 18/01/05 → 21/01/05 |