An Architecture for High Performance Computing and Data Systems using Byte-Addressable Persistent Memory

William Jackson; Michele Weiland; Mark Parsons; Bernhard Homoelle

doi:10.1007/978-3-030-34356-9_21

An Architecture for High Performance Computing and Data Systems using Byte-Addressable Persistent Memory

William Jackson, Michele Weiland, Mark Parsons, Bernhard Homoelle

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract / Description of output

Non-volatile and byte-addressable memory technology with performance close to main memory has the potential to revolutionise computing systems in the near future. Such memory technology provides the potential for extremely large memory regions (i.e. > 3TB per server), very high performance I/O, and new ways of storing and sharing data for applications and workflows. This paper proposes hardware and system software architectures that have been designed to exploit such memory for High Performance Computing and High Performance Data Analytics systems, along with descriptions of how applications could benet from such hardware, and initial performance results on a system with Intel Optane DC Persistent Memory.

Original language	English
Title of host publication	High Performance Computing
Subtitle of host publication	ISC High Performance 2019
Editors	M Weiland , G Juckeland, S Alam , H Jagode
Publisher	Springer
Pages	258-274
Number of pages	19
ISBN (Electronic)	978-3-030-34356-9
ISBN (Print)	978-3-030-34355-2
DOIs	https://doi.org/10.1007/978-3-030-34356-9_21
Publication status	E-pub ahead of print - 3 Dec 2019
Event	ISC High Performance 2019 - Frankfurt, Germany Duration: 16 Jun 2019 → 20 Jun 2019 https://www.isc-hpc.com/research-papers-2019.html

Publication series

Name	Lecture Notes in Computer Science
Publisher	Springer Verlag
ISSN (Print)	0302-9743

Conference

Conference	ISC High Performance 2019
Abbreviated title	ISC HPC 2019
Country/Territory	Germany
City	Frankfurt
Period	16/06/19 → 20/06/19
Internet address	https://www.isc-hpc.com/research-papers-2019.html

Keywords / Materials (for Non-textual outputs)

Non-volatile memory
persistent memory
system architecture
systemware
NVRAM
B-APM

Access to Document

10.1007/978-3-030-34356-9_21Licence: All Rights Reserved

BAPM_HPC_IODC19Accepted author manuscript, 653 KB

https://link.springer.com/chapter/10.1007/978-3-030-34356-9_21Licence: All Rights Reserved

NEXTGenIO: Next Generation I/O for Exascale
Parsons, M.
EU government bodies
1/10/15 → 30/09/19
Project: Research

Mark Parsons
- Computer Systems
- Edinburgh Parallel Computing Centre - Personal Chair in High Performance Computing
Person: Academic: Research Active

Cite this

Jackson, W., Weiland, M., Parsons, M., & Homoelle, B. (2019). An Architecture for High Performance Computing and Data Systems using Byte-Addressable Persistent Memory. In M. Weiland , G. Juckeland, S. Alam , & H. Jagode (Eds.), High Performance Computing: ISC High Performance 2019 (pp. 258-274). (Lecture Notes in Computer Science). Springer. Advance online publication. https://doi.org/10.1007/978-3-030-34356-9_21

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title = "An Architecture for High Performance Computing and Data Systems using Byte-Addressable Persistent Memory",

abstract = "Non-volatile and byte-addressable memory technology with performance close to main memory has the potential to revolutionise computing systems in the near future. Such memory technology provides the potential for extremely large memory regions (i.e. > 3TB per server), very high performance I/O, and new ways of storing and sharing data for applications and workflows. This paper proposes hardware and system software architectures that have been designed to exploit such memory for High Performance Computing and High Performance Data Analytics systems, along with descriptions of how applications could benet from such hardware, and initial performance results on a system with Intel Optane DC Persistent Memory.",

keywords = "Non-volatile memory, persistent memory, system architecture, systemware, NVRAM, B-APM",

author = "William Jackson and Michele Weiland and Mark Parsons and Bernhard Homoelle",

year = "2019",

month = dec,

day = "3",

doi = "10.1007/978-3-030-34356-9_21",

language = "English",

isbn = "978-3-030-34355-2",

series = "Lecture Notes in Computer Science",

publisher = "Springer",

pages = "258--274",

editor = "{Weiland }, M and G Juckeland and {Alam }, S and {Jagode }, H",

booktitle = "High Performance Computing",

note = "ISC High Performance 2019, ISC HPC 2019 ; Conference date: 16-06-2019 Through 20-06-2019",

url = "https://www.isc-hpc.com/research-papers-2019.html",

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Jackson, W , Weiland, M , Parsons, M & Homoelle, B 2019, An Architecture for High Performance Computing and Data Systems using Byte-Addressable Persistent Memory. in M Weiland , G Juckeland, S Alam & H Jagode (eds), High Performance Computing: ISC High Performance 2019. Lecture Notes in Computer Science, Springer, pp. 258-274, ISC High Performance 2019, Frankfurt, Germany, 16/06/19. https://doi.org/10.1007/978-3-030-34356-9_21

An Architecture for High Performance Computing and Data Systems using Byte-Addressable Persistent Memory. / Jackson, William ; Weiland, Michele ; Parsons, Mark et al.
High Performance Computing: ISC High Performance 2019. ed. / M Weiland ; G Juckeland; S Alam ; H Jagode . Springer, 2019. p. 258-274 (Lecture Notes in Computer Science).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - An Architecture for High Performance Computing and Data Systems using Byte-Addressable Persistent Memory

AU - Jackson, William

AU - Weiland, Michele

AU - Parsons, Mark

AU - Homoelle, Bernhard

PY - 2019/12/3

Y1 - 2019/12/3

N2 - Non-volatile and byte-addressable memory technology with performance close to main memory has the potential to revolutionise computing systems in the near future. Such memory technology provides the potential for extremely large memory regions (i.e. > 3TB per server), very high performance I/O, and new ways of storing and sharing data for applications and workflows. This paper proposes hardware and system software architectures that have been designed to exploit such memory for High Performance Computing and High Performance Data Analytics systems, along with descriptions of how applications could benet from such hardware, and initial performance results on a system with Intel Optane DC Persistent Memory.

AB - Non-volatile and byte-addressable memory technology with performance close to main memory has the potential to revolutionise computing systems in the near future. Such memory technology provides the potential for extremely large memory regions (i.e. > 3TB per server), very high performance I/O, and new ways of storing and sharing data for applications and workflows. This paper proposes hardware and system software architectures that have been designed to exploit such memory for High Performance Computing and High Performance Data Analytics systems, along with descriptions of how applications could benet from such hardware, and initial performance results on a system with Intel Optane DC Persistent Memory.

KW - Non-volatile memory

KW - persistent memory

KW - system architecture

KW - systemware

KW - NVRAM

KW - B-APM

U2 - 10.1007/978-3-030-34356-9_21

DO - 10.1007/978-3-030-34356-9_21

M3 - Conference contribution

SN - 978-3-030-34355-2

T3 - Lecture Notes in Computer Science

SP - 258

EP - 274

BT - High Performance Computing

A2 - Weiland , M

A2 - Juckeland, G

A2 - Alam , S

A2 - Jagode , H

PB - Springer

T2 - ISC High Performance 2019

Y2 - 16 June 2019 through 20 June 2019

ER -

Jackson W , Weiland M , Parsons M, Homoelle B. An Architecture for High Performance Computing and Data Systems using Byte-Addressable Persistent Memory. In Weiland M, Juckeland G, Alam S, Jagode H, editors, High Performance Computing: ISC High Performance 2019. Springer. 2019. p. 258-274. (Lecture Notes in Computer Science). Epub 2019 Dec 3. doi: 10.1007/978-3-030-34356-9_21

An Architecture for High Performance Computing and Data Systems using Byte-Addressable Persistent Memory

Abstract / Description of output

Publication series

Conference

Keywords / Materials (for Non-textual outputs)

Access to Document

Fingerprint

Projects

NEXTGenIO: Next Generation I/O for Exascale

Profiles

Mark Parsons

Cite this