TY - GEN
T1 - An FPGA based system for interfacing with crossbar arrays
AU - Foster, Patrick
AU - Huang, Jinqi
AU - Serb, Alex
AU - Prodromakis, Themis
AU - Papavassiliou, Christos
N1 - Publisher Copyright:
© 2020 IEEE
PY - 2020/9/28
Y1 - 2020/9/28
N2 - Memristor crossbar arrays offer a novel new approach for designing high density non-volatile memory; however, precise measurement of resistive crossbar elements requires parallel current sensing capability not found in existing instruments. To provide this capability, we have designed and built an FPGA-based crossbar control instrument with independent per-channel biasing and measuring. In this paper, we cover the architecture of this new instrument, its operation and interface, and the results of testing conducted on the instruments pulse driver circuitry.
AB - Memristor crossbar arrays offer a novel new approach for designing high density non-volatile memory; however, precise measurement of resistive crossbar elements requires parallel current sensing capability not found in existing instruments. To provide this capability, we have designed and built an FPGA-based crossbar control instrument with independent per-channel biasing and measuring. In this paper, we cover the architecture of this new instrument, its operation and interface, and the results of testing conducted on the instruments pulse driver circuitry.
KW - Memristor crossbars
KW - Parallel read
KW - Write capability
UR - http://www.scopus.com/inward/record.url?scp=85109335317&partnerID=8YFLogxK
U2 - 10.1109/ISCAS45731.2020.9180671
DO - 10.1109/ISCAS45731.2020.9180671
M3 - Conference contribution
AN - SCOPUS:85109335317
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - 2020 IEEE International Symposium on Circuits and Systems, ISCAS 2020 - Proceedings
PB - Institute of Electrical and Electronics Engineers
T2 - 52nd IEEE International Symposium on Circuits and Systems, ISCAS 2020
Y2 - 10 October 2020 through 21 October 2020
ER -