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Abstract / Description of output
This paper presents a 2-bin SPAD-based indirect time-of-flight (ITOF) pixel circuit with low power low-voltage differential clock distribution and a partially in-pixel single-slope ADC. An in-pixel dynamic comparator performs dual functions as a SPAD event-driven low-swing clock sampler and a comparator for self-referenced ADC conversion with digital delta reset sampling (DRS). The pixel achieves a full well capacity of 128 – 512 photons (6.83 – 8.82 effective bit depth), a low dynamic power consumption of 13.9-24.5 nW/MHz SPAD rate at a pitch of 7.2 μm in STMicroelectronics’ 40nm CMOS and is 3D stacking ready.
Original language | English |
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Pages (from-to) | 158-161 |
Number of pages | 4 |
Journal | IEEE Solid-State Circuits Letters |
Volume | 5 |
Early online date | 1 Jun 2022 |
DOIs | |
Publication status | Published - 1 Jun 2022 |
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Dive into the research topics of 'An Indirect Time-of-Flight SPAD Pixel with Dynamic Comparator re-use for a Single-Slope ADC'. Together they form a unique fingerprint.Projects
- 1 Finished
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PhD Student Support- as part of the UoE/STMicroelectronic Research Collaboration
UK industry, commerce and public corporations
1/01/11 → 29/02/20
Project: Research