In this position paper we describe the benefit of embracing the fundamental dataflow differences between FPGAs and other architectures when writing high performance codes for reconfigurable architectures, and encouraging the programmer to base their abstract execution model on that of an application specific dataflow machine. By doing so we believe it most effectively encourages the development of fast by construction codes for reconfigurable architectures and modern takes on generations-old dataflow languages such as Lucid are worth considering for FPGAs. We give a brief overview of our Lucent programming language which is based on the foundations of Lucid and designed to deliver high performance and programmer productivity for FPGAs.
|Publication status||Published - 15 Apr 2021|
|Event||1st Workshop on Languages, Tools, and Techniques for Accelerator Design - Virtual|
Duration: 15 Apr 2021 → 15 Apr 2021
|Workshop||1st Workshop on Languages, Tools, and Techniques for Accelerator Design|
|Abbreviated title||LATTE 2021|
|Period||15/04/21 → 15/04/21|