Automated dynamic throughput-constrained structural-level pipelining in streaming applications

Mark Muir, Tughrul Arslan, Iain Lindsay

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Stream processing applications such as image signal processing demand high throughput. However, customers increasingly demand runtime flexibility in their designs, which cannot be provided by custom ASIC solutions. Currently, reconfigurable processors tend to offer insufficient throughput for widespread use in streaming applications. This paper demonstrates how structural-level pipelining techniques can be applied to rapidly dynamically reconfigurable computing architectures, in order to increase throughput. This is done by automatically inserting registers into the data path of performance critical code sections that have already been optimised into a single configuration context. A new algorithm is presented to choose the insertion point of pipeline stage registers in order to meet a specified throughput whilst minimising register resource usage. The paper then demonstrates a new approach where properties of dynamic reconfiguration can be utilised to perform the tasks of pipeline stage initialisation and flushing. The technique is demonstrated on a real-life application: the demosaic filter in a standard image signal processing pipe used in modern digital cameras, and can be seen to boost the throughput from 16MPixels/s to 51MPixels/s on an example reconfigurable processor.

Original languageEnglish
Title of host publication2008 DESIGN, AUTOMATION AND TEST IN EUROPE, VOLS 1-3
Place of PublicationNEW YORK
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages4
ISBN (Print)978-3-9810801-3-1
Publication statusPublished - 2008
EventDesign, Automation and Test in Europe Conference and Exhibition (DATE 08) - Munich
Duration: 10 Mar 200814 Mar 2008


ConferenceDesign, Automation and Test in Europe Conference and Exhibition (DATE 08)

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