Backside illuminated SPAD image sensor with 7.83μm pitch in 3D-stacked CMOS technology

Tarek Al abbas, Neale Dutton, Oscar Almer, Sara Pellegrini, Y. Henrion, Robert Henderson

Research output: Contribution to conferencePaperpeer-review

Abstract / Description of output

We present the first 3D-stacked backside illuminated (BSI) single photon avalanche diode (SPAD) image sensor capable of both single photon counting (SPC) intensity, and time resolved imaging. The 128×120 prototype has a pixel pitch of 7.83 μm making it the smallest pixel reported for SPAD image sensors. A low power, high density 40nm bottom tier hosts the quenching front end and processing electronics while an imaging specific 65nm top tier hosts the photo-detectors with a 1-to-1 hybrid bond connection [1]. The SPAD exhibits a median dark count rate (DCR) below 200cps at room temperature and 1V excess bias, and has a peak photon detection probability (PDP) of 27.5% at 640nm and 3 V excess bias.
Original languageEnglish
Number of pages4
Publication statusPublished - 3 Dec 2016
EventInternational Electron Devices Meeting - San Francisco, United States
Duration: 3 Dec 20166 Dec 2016


ConferenceInternational Electron Devices Meeting
Country/TerritoryUnited States
CitySan Francisco


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