Abstract
The paper describes the architecture, design, implementation, and test of a reconfigurable digital baseband processor for an RF-MIMO WLAN transceiver that performs the signal combining in the analogue domain. Description includes baseband algorithms (the main blocks being MIMO channel estimation and Tx-Rx analog beam forming), their FPGA-based implementation, a baseband PCB, and real-time tests.
Original language | English |
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Title of host publication | 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings |
Pages | 798-801 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 1 Dec 2010 |
Event | 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Athens, Greece Duration: 12 Dec 2010 → 15 Dec 2010 |
Conference
Conference | 2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 |
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Country | Greece |
City | Athens |
Period | 12/12/10 → 15/12/10 |