Projects per year
Abstract
This paper describes the implementation of a CMOS edge-detecting pixel array with on-chip adaptation that compensates for intrinsic variation between devices. The adaptation algorithm, based on asymmetric Hebbian training, uses spike timing to adapt out the effects of device mismatch and process variation. Each pixel adapts to background illuminance and provides high-pass filtering output with respect to local positive and negative illuminance transients. Sample chips have been manufactured using a 0.35 μm CMOS technology, and the test results confirming the feasibility of the chosen approach are reported.
Original language | English |
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Pages | D278-D281 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 2004 |
Event | IEEE TENCON 2004 - 2004 IEEE Region 10 Conference: Analog and Digital Techniques in Electrical Engineering - Chiang Mai, United Kingdom Duration: 21 Nov 2004 → 24 Nov 2004 |
Conference
Conference | IEEE TENCON 2004 - 2004 IEEE Region 10 Conference: Analog and Digital Techniques in Electrical Engineering |
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Country/Territory | United Kingdom |
City | Chiang Mai |
Period | 21/11/04 → 24/11/04 |
Keywords / Materials (for Non-textual outputs)
- Image edge detection
Fingerprint
Dive into the research topics of 'Compensating mismatch in a dedicated pixel array for moving edge detection'. Together they form a unique fingerprint.Projects
- 1 Finished
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Silicon spiking systems: collective parallel computation & adaptive
Murray, A. (Principal Investigator), Reekie, M. (Co-investigator) & Renshaw, D. (Co-investigator)
1/07/02 → 31/12/05
Project: Research