Compiling Neural Networks for a Computational Memory Accelerator

Kornilios Kourtis, Martino Dazzi, Nikolas Ioannou, Tobias Grosser, Abu Sebastian, Evangelos Eleftheriou

Research output: Contribution to conferencePaperpeer-review


Computational memory (CM) is a promising approach for accelerating inference on neural networks (NN) by using enhanced memories that, in addition to storing data, allow computations on them. One of the main challenges of this approach is defining a hardware/software interface that allows a compiler to map NN models for efficient execution on the underlying CM accelerator. This is a non-trivial task because efficiency dictates that the CM accelerator is explicitly programmed as a dataflow engine where the execution of the different NN layers form a pipeline. In this paper, we present our work towards a software stack for executing ML models on such a multi-core CM accelerator. We describe an architecture for the hardware and software, and focus on the problem of implementing the appropriate control logic so that data dependencies are respected. We propose a solution to the latter that is based on polyhedral compilation.
Original languageEnglish
Number of pages8
Publication statusPublished - 27 Apr 2020
EventThe 10th Workshop on Systems for Post-Moore Architectures - Heraklion, Greece
Duration: 27 Apr 202027 Apr 2020
Conference number: 10


WorkshopThe 10th Workshop on Systems for Post-Moore Architectures
Abbreviated titleSPMA 2020

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