Complexity-Effective Rename Table Design for Rapid Speculation Recovery

Görkem Asilioglu, Emine Merve Kaya, Oguz Ergin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Register renaming is a widely used technique to remove false data dependencies in contemporary superscalar microprocessors. The register rename logic includes a mapping table that holds the physical register identifiers assigned to each architectural register. This mapping table needs to be recovered to its correct state when a branch prediction occurs. In this paper we propose a scalable rename table design that allows fast recovery on branch predictions. A FIFO scheme is applied with a distributed rename table structure that holds a variable number of checkpoints specific to each architectural register. Our results show that although the area of the rename table is increased, it is possible to recover from a branch misprediction in at worst 2 cycles.
Original languageEnglish
Title of host publicationArchitecture of Computing Systems - ARCS 2010
Subtitle of host publication23rd International Conference, Hannover, Germany, February 22-25, 2010. Proceedings
PublisherSpringer
Pages15-24
Number of pages10
ISBN (Electronic)978-3-642-11950-7
ISBN (Print)978-3-642-11949-1
DOIs
Publication statusPublished - 2010

Publication series

NameLecture Notes in Computer Science
PublisherSpringer Berlin Heidelberg
Volume5974
ISSN (Print)0302-9743

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