Compound Memory Models

Andres Goens*, Soham Chakraborty, Susmit Sarkar, Sukarn Agarwal, Nicolai Oswald, Vijay Nagarajan

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract / Description of output

Today’s mobile, desktop, and server processors are heterogeneous, consisting not only of CPUs but also GPUs and other accelerators. Such heterogeneous processors are starting to expose a shared memory interface across these devices. Given that each of these individual devices typically supports a distinct instruction set architecture and a distinct memory consistency model, it is not clear what the memory consistency model of the heterogeneous machine should be. In this paper, we answer this question by formalizing “compound” consistency models: we present a compositional operational model describing the resulting model when devices with distinct consistency models are fused together. We instantiate our model with the compound x86TSO/PTX model – a CPU enforcing x86TSO and a GPU enforcing the PTX model. A key result is that the x86TSO/PTX compound model retains compiler mappings from the language-based (scoped) C memory model. This means that threads mapped to the x86TSO device can continue to use the already proven C-to-x86TSO compiler mapping, and the same for PTX.
Original languageEnglish
Article number153
Pages (from-to)1145-1168
Number of pages24
JournalProceedings of the ACM on Programming Languages
Volume7
Issue numberPLDI
DOIs
Publication statusPublished - 6 Jun 2023
Event44th ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI 2023) - Orlando, United States
Duration: 17 Jun 202321 Jun 2023
Conference number: 44
https://pldi23.sigplan.org/

Keywords / Materials (for Non-textual outputs)

  • compound memory models
  • consistency models
  • coherence protocols

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