Projects per year
Abstract
Intelligently partitioning the last-level cache within a chip multiprocessor can bring significant performance improvements. Resources are given to the applications that can benefit most from them, restricting each core to a number of logical cache ways. However, although overall performance is increased, existing schemes fail to consider energy saving when making their partitioning decisions. This paper presents Cooperative Partitioning, a runtime partitioning scheme that reduces both dynamic and static energy while maintaining high performance. It works by enforcing cached data to be way-aligned, so that a way is owned by a single core at any time. Cores cooperate with each other to migrate ways between themselves after partitioning decisions have been made. Upon access to the cache, a core needs only to consult the ways that it owns to find its data, saving dynamic energy. Unused ways can be power-gated for static energy saving. We evaluate our approach on two-core and four-core systems, showing that we obtain average dynamic and static energy savings of 35% and 25% compared to a fixed partitioning scheme. In addition, Cooperative Partitioning maintains high performance while transferring ways five times faster than an existing state-of-the-art technique.
Original language | English |
---|---|
Title of host publication | High Performance Computer Architecture (HPCA), 2012 IEEE 18th International Symposium on |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 1-12 |
Number of pages | 12 |
ISBN (Electronic) | 978-1-4673-0825-0 |
ISBN (Print) | 978-1-4673-0827-4 |
DOIs | |
Publication status | Published - 1 Feb 2012 |
Fingerprint
Dive into the research topics of 'Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs'. Together they form a unique fingerprint.Projects
- 1 Finished
-
Dynamic Adaptation in Hetrogeneous Multicore Embedded Processors
Haas, H., Franke, B., O'Boyle, M. & Topham, N.
1/11/10 → 30/07/14
Project: Research