Design and fabrication of a copper test structure for use as an electrical critical dimension reference

B.J.R. Shulver; A.S. Bunting; A.M. Gundlach; L.I. Haworth; A.W.S. Ross; A.J. Snell; J.T.M. Stevenson; A.J. Walton; R. A. Allen; M.W. Cresswell

doi:10.1109/ICMTS.2006.1614288

Design and fabrication of a copper test structure for use as an electrical critical dimension reference

B.J.R. Shulver, A.S. Bunting, A.M. Gundlach, L.I. Haworth, A.W.S. Ross, A.J. Snell, J.T.M. Stevenson, A.J. Walton, R. A. Allen, M.W. Cresswell

School of Engineering

Research output: Chapter in Book/Report/Conference proceeding › Other chapter contribution

Abstract

A novel copper damascene process is reported for fabrication of Electrical Critical Dimension (ECD) reference material. The method of fabrication first creates an initial "silicon preform" whose linewidth is transferred into a trench using a silicon nitride mould. The trench is created by removing a portion of the silicon and replacing it with copper to enable both Transmission Electron Microscopy (TEM) and electrical linewidth measurements to be made on the same structure. The technique is based on the use of anisotropic wet etching of (110) silicon wafers to yield silicon features with vertical sidewalls. The paper demonstrates that this method successfully produces copper lines which serve as ECD control structures and the process can be applied to any damascene compatible material for developing electrical linewidth measurement reference material.

Original language	English
Title of host publication	ICMTS 2006: Proceedings of the 2006 International Conference on Microelectronic Test Structures
Place of Publication	NEW YORK
Publisher	IEEE, ELECTRON DEVICES SOC & RELIABILITY GROUP
Pages	124-129
Number of pages	6
Volume	2006
ISBN (Print)	1-4244-0167-4
DOIs	https://doi.org/10.1109/ICMTS.2006.1614288
Publication status	Published - 2006
Event	International Conference on Microelectronic Test Structures (ICMTS 2006) - Austin Duration: 6 Mar 2006 → 9 Mar 2006

Conference

Conference	International Conference on Microelectronic Test Structures (ICMTS 2006)
City	Austin
Period	6/03/06 → 9/03/06

Access to Document

10.1109/ICMTS.2006.1614288

Cite this

Shulver, B. J. R., Bunting, A. S., Gundlach, A. M., Haworth, L. I., Ross, A. W. S., Snell, A. J., Stevenson, J. T. M., Walton, A. J., Allen, R. A., & Cresswell, M. W. (2006). Design and fabrication of a copper test structure for use as an electrical critical dimension reference. In ICMTS 2006: Proceedings of the 2006 International Conference on Microelectronic Test Structures (Vol. 2006, pp. 124-129). IEEE, ELECTRON DEVICES SOC & RELIABILITY GROUP. https://doi.org/10.1109/ICMTS.2006.1614288

@inbook{f0ffc662274e4fc49e3b447590acd4d2,

title = "Design and fabrication of a copper test structure for use as an electrical critical dimension reference",

abstract = "A novel copper damascene process is reported for fabrication of Electrical Critical Dimension (ECD) reference material. The method of fabrication first creates an initial {"}silicon preform{"} whose linewidth is transferred into a trench using a silicon nitride mould. The trench is created by removing a portion of the silicon and replacing it with copper to enable both Transmission Electron Microscopy (TEM) and electrical linewidth measurements to be made on the same structure. The technique is based on the use of anisotropic wet etching of (110) silicon wafers to yield silicon features with vertical sidewalls. The paper demonstrates that this method successfully produces copper lines which serve as ECD control structures and the process can be applied to any damascene compatible material for developing electrical linewidth measurement reference material.",

author = "B.J.R. Shulver and A.S. Bunting and A.M. Gundlach and L.I. Haworth and A.W.S. Ross and A.J. Snell and J.T.M. Stevenson and A.J. Walton and Allen, {R. A.} and M.W. Cresswell",

year = "2006",

doi = "10.1109/ICMTS.2006.1614288",

language = "English",

isbn = "1-4244-0167-4",

volume = "2006",

pages = "124--129",

booktitle = "ICMTS 2006: Proceedings of the 2006 International Conference on Microelectronic Test Structures",

publisher = "IEEE, ELECTRON DEVICES SOC & RELIABILITY GROUP",

note = "International Conference on Microelectronic Test Structures (ICMTS 2006) ; Conference date: 06-03-2006 Through 09-03-2006",

}

Shulver, BJR, Bunting, AS, Gundlach, AM, Haworth, LI, Ross, AWS, Snell, AJ, Stevenson, JTM, Walton, AJ, Allen, RA & Cresswell, MW 2006, Design and fabrication of a copper test structure for use as an electrical critical dimension reference. in ICMTS 2006: Proceedings of the 2006 International Conference on Microelectronic Test Structures. vol. 2006, IEEE, ELECTRON DEVICES SOC & RELIABILITY GROUP, NEW YORK, pp. 124-129, International Conference on Microelectronic Test Structures (ICMTS 2006), Austin, 6/03/06. https://doi.org/10.1109/ICMTS.2006.1614288

Design and fabrication of a copper test structure for use as an electrical critical dimension reference. / Shulver, B.J.R.; Bunting, A.S.; Gundlach, A.M. et al.
ICMTS 2006: Proceedings of the 2006 International Conference on Microelectronic Test Structures. Vol. 2006 NEW YORK: IEEE, ELECTRON DEVICES SOC & RELIABILITY GROUP, 2006. p. 124-129.

Research output: Chapter in Book/Report/Conference proceeding › Other chapter contribution

TY - CHAP

T1 - Design and fabrication of a copper test structure for use as an electrical critical dimension reference

AU - Shulver, B.J.R.

AU - Bunting, A.S.

AU - Gundlach, A.M.

AU - Haworth, L.I.

AU - Ross, A.W.S.

AU - Snell, A.J.

AU - Stevenson, J.T.M.

AU - Walton, A.J.

AU - Allen, R. A.

AU - Cresswell, M.W.

PY - 2006

Y1 - 2006

N2 - A novel copper damascene process is reported for fabrication of Electrical Critical Dimension (ECD) reference material. The method of fabrication first creates an initial "silicon preform" whose linewidth is transferred into a trench using a silicon nitride mould. The trench is created by removing a portion of the silicon and replacing it with copper to enable both Transmission Electron Microscopy (TEM) and electrical linewidth measurements to be made on the same structure. The technique is based on the use of anisotropic wet etching of (110) silicon wafers to yield silicon features with vertical sidewalls. The paper demonstrates that this method successfully produces copper lines which serve as ECD control structures and the process can be applied to any damascene compatible material for developing electrical linewidth measurement reference material.

AB - A novel copper damascene process is reported for fabrication of Electrical Critical Dimension (ECD) reference material. The method of fabrication first creates an initial "silicon preform" whose linewidth is transferred into a trench using a silicon nitride mould. The trench is created by removing a portion of the silicon and replacing it with copper to enable both Transmission Electron Microscopy (TEM) and electrical linewidth measurements to be made on the same structure. The technique is based on the use of anisotropic wet etching of (110) silicon wafers to yield silicon features with vertical sidewalls. The paper demonstrates that this method successfully produces copper lines which serve as ECD control structures and the process can be applied to any damascene compatible material for developing electrical linewidth measurement reference material.

UR - http://www.scopus.com/inward/record.url?scp=33749510718&partnerID=8YFLogxK

U2 - 10.1109/ICMTS.2006.1614288

DO - 10.1109/ICMTS.2006.1614288

M3 - Other chapter contribution

AN - SCOPUS:33749510718

SN - 1-4244-0167-4

VL - 2006

SP - 124

EP - 129

BT - ICMTS 2006: Proceedings of the 2006 International Conference on Microelectronic Test Structures

PB - IEEE, ELECTRON DEVICES SOC & RELIABILITY GROUP

CY - NEW YORK

T2 - International Conference on Microelectronic Test Structures (ICMTS 2006)

Y2 - 6 March 2006 through 9 March 2006

ER -

Shulver BJR, Bunting AS, Gundlach AM, Haworth LI, Ross AWS, Snell AJ et al. Design and fabrication of a copper test structure for use as an electrical critical dimension reference. In ICMTS 2006: Proceedings of the 2006 International Conference on Microelectronic Test Structures. Vol. 2006. NEW YORK: IEEE, ELECTRON DEVICES SOC & RELIABILITY GROUP. 2006. p. 124-129 doi: 10.1109/ICMTS.2006.1614288

Design and fabrication of a copper test structure for use as an electrical critical dimension reference

Abstract

Conference

Access to Document

Other files and links

Fingerprint

Optimisation of sub-100nm copper-interconnect and photoresist tracks for high density IC fabrication metrology

Cite this

Design and fabrication of a copper test structure for use as an electrical critical dimension reference

Abstract

Conference

Access to Document

Other files and links

Fingerprint

Projects

Optimisation of sub-100nm copper-interconnect and photoresist tracks for high density IC fabrication metrology

Cite this