Projects per year
Abstract
FPGAs are popular in many fields but yet to gain wide acceptance for accelerating HPC codes. A major cause is that whilst the growth of High Level Synthesis (HLS), enabling the use of C or C++, has increased accessibility, without wide-spread algorithmic changes these tools only provide correct-by-construction rather than fast-by-construction programming. The fundamental issue is that HLS presents a Von Neumann based execution model which is poorly suited to FPGAs, resulting in significant disconnect between HLS's language semantics and how experienced FPGA programmers structure dataflow algorithms to exploit hardware. We have developed the high-level language Lucent which builds on principles previously developed for programming general-purpose dataflow architectures. Using Lucent as a vehicle, in this paper we explore appropriate abstractions for developing application specific dataflow machines on reconfigurable architectures. The result is an approach enabling fast-by-construction programming for FPGAs, delivering competitive performance against hand optimised HLS codes whilst significantly enhancing programmer productivity.
Original language | English |
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Article number | 4 |
Pages (from-to) | 334-360 |
Number of pages | 26 |
Journal | Chips |
Volume | 3 |
Issue number | 4 |
DOIs | |
Publication status | Published - 4 Oct 2024 |
Keywords / Materials (for Non-textual outputs)
- FPGAs
- dataflow
- high level synthesis
- Lucent
- programming models
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Efficient Cross-Domain DSL Development for Exascale
Grosser, T., Brown, N., Krause, A. & Steuwer, M.
Engineering and Physical Sciences Research Council
2/08/21 → 31/03/25
Project: Research
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Greener supercomputing: ensuring weather and climate simulations do not cost the earth
29/02/24 → 28/02/25
Project: Research
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