Efficient Parallelization Using Combined Loop and Data Transformations

Michael F. P. O'Boyle, Peter M. W. Knijnenburg

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract / Description of output

The paper attempts to minimise parallelisation overhead on distributed shared memory machines, such as the SGi Origin 2000, by the combination of non-singular loop and data transformations. We show that conflicting requirements on a loop transformation may be resolved by using a data transformation and vice-versa. We develop optimisation criteria for locality, synchronisation and communication and show that neither loop nor data transformations can be solely used for efficient parallelisation. This leads to the development of a novel global optimisation heuristic which is applied to 3 SPEC kernels where it is shown to outperform techniques solely based on loop or data transformations and to give significant improvement over an existing state-of-the-art commercial auto-paralleliser
Original languageEnglish
Title of host publicationParallel Architectures and Compilation Techniques, 1999. Proceedings. 1999 International Conference on
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages10
ISBN (Print)0-7695-0425-6
Publication statusPublished - 1999


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