Electrical Assessment of Planarisation for CMP and SOG Technologies

J. P. Elliott, M. Fallon, A. J. Walton, J. T. M. Stevenson, A. O'Hara, C. M. Peyne, A. Shaffi, C. M. Reeves

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageUndefined/Unknown
Title of host publicationIEEE International Conference on Microelectronic Test Structures
Pages5
Number of pages1
Publication statusPublished - 1997

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