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Resistive electrical test structures have been designed to enable the characterization of optical proximity correction (OPC) applied to a right-angled corner in a conducting track. The OPC consists of square serifs that are either added to the outside corner or subtracted from the inner corner. Varying degrees of OPC can be applied by changing the size of the square serif or by changing the amount by which it encroaches on or protrudes from the corner. A prototype test mask has been fabricated that contains test structures suitable for on-mask electrical measurement. The same mask was used to print the test pattern in polysilicon and aluminium using an i-line lithography tool and results from these structures clearly show that OPC has an impact on the resistance of the final printed features. In particular, the level of corner rounding is dependent upon the dimensions of the serifs employed and the measured resistance can be used to characterize the effects of different levels of OPC applied to the inner corners.
|Pages (from-to)||162 -169|
|Journal||IEEE Transactions on Semiconductor Manufacturing|
|Publication status||Published - 1 May 2012|
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- 2 Finished
1/04/10 → 28/02/15
Development of test structures for characterising IC technologies (GR/L81000/01)
Walton, A., Haworth, L. & Murray, A.
1/06/98 → 28/02/02