Energy-efficient Cache Partitioning for Future CMPs

Karthik T. Sundararajan, Timothy M. Jones, Nigel P. Topham

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The demand for high performance computing systems requires processor vendors to increase the number of cores per chip multiprocessor (CMP). However, as their number grows, the core-to-way ratio in the last level cache (LLC) increases, presenting problems to existing cache partitioning techniques which require more ways than cores. Further, effective energy management of the LLC becomes increasingly important due to its size.

In this paper we propose an LLC energy-saving scheme for high-performance, many-core processors. It partitions the data within the cache into shared and private regions. Applications only access the ways containing the type of data that they require, realising dynamic energy savings. Any ways that are not within the shared or private regions can be turned off to save static energy.
Original languageEnglish
Title of host publicationProceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques
Place of PublicationNew York, NY, USA
PublisherACM
Pages465-466
Number of pages2
DOIs
Publication statusPublished - 2012

Publication series

NamePACT '12
PublisherACM

Keywords

  • cache partitioning, energy-efficient cache, llc management

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