Energy-efficient Cache Partitioning for Future CMPs

Karthik T. Sundararajan; Timothy M. Jones; Nigel P. Topham

doi:10.1145/2370816.2370898

Energy-efficient Cache Partitioning for Future CMPs

Karthik T. Sundararajan, Timothy M. Jones, Nigel P. Topham

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

The demand for high performance computing systems requires processor vendors to increase the number of cores per chip multiprocessor (CMP). However, as their number grows, the core-to-way ratio in the last level cache (LLC) increases, presenting problems to existing cache partitioning techniques which require more ways than cores. Further, effective energy management of the LLC becomes increasingly important due to its size.

In this paper we propose an LLC energy-saving scheme for high-performance, many-core processors. It partitions the data within the cache into shared and private regions. Applications only access the ways containing the type of data that they require, realising dynamic energy savings. Any ways that are not within the shared or private regions can be turned off to save static energy.

Original language	English
Title of host publication	Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques
Place of Publication	New York, NY, USA
Publisher	ACM
Pages	465-466
Number of pages	2
DOIs	https://doi.org/10.1145/2370816.2370898
Publication status	Published - 2012

Publication series

Name	PACT '12
Publisher	ACM

Keywords / Materials (for Non-textual outputs)

cache partitioning, energy-efficient cache, llc management

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10.1145/2370816.2370898

http://doi.acm.org/10.1145/2370816.2370898

Cite this

@inproceedings{dcb3c36ec9e942bba68650bb3357817a,

title = "Energy-efficient Cache Partitioning for Future CMPs",

abstract = "The demand for high performance computing systems requires processor vendors to increase the number of cores per chip multiprocessor (CMP). However, as their number grows, the core-to-way ratio in the last level cache (LLC) increases, presenting problems to existing cache partitioning techniques which require more ways than cores. Further, effective energy management of the LLC becomes increasingly important due to its size.In this paper we propose an LLC energy-saving scheme for high-performance, many-core processors. It partitions the data within the cache into shared and private regions. Applications only access the ways containing the type of data that they require, realising dynamic energy savings. Any ways that are not within the shared or private regions can be turned off to save static energy.",

keywords = "cache partitioning, energy-efficient cache, llc management",

author = "Sundararajan, {Karthik T.} and Jones, {Timothy M.} and Topham, {Nigel P.}",

year = "2012",

doi = "10.1145/2370816.2370898",

language = "English",

series = "PACT '12",

publisher = "ACM",

pages = "465--466",

booktitle = "Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques",

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T1 - Energy-efficient Cache Partitioning for Future CMPs

AU - Sundararajan, Karthik T.

AU - Jones, Timothy M.

AU - Topham, Nigel P.

PY - 2012

Y1 - 2012

N2 - The demand for high performance computing systems requires processor vendors to increase the number of cores per chip multiprocessor (CMP). However, as their number grows, the core-to-way ratio in the last level cache (LLC) increases, presenting problems to existing cache partitioning techniques which require more ways than cores. Further, effective energy management of the LLC becomes increasingly important due to its size.In this paper we propose an LLC energy-saving scheme for high-performance, many-core processors. It partitions the data within the cache into shared and private regions. Applications only access the ways containing the type of data that they require, realising dynamic energy savings. Any ways that are not within the shared or private regions can be turned off to save static energy.

AB - The demand for high performance computing systems requires processor vendors to increase the number of cores per chip multiprocessor (CMP). However, as their number grows, the core-to-way ratio in the last level cache (LLC) increases, presenting problems to existing cache partitioning techniques which require more ways than cores. Further, effective energy management of the LLC becomes increasingly important due to its size.In this paper we propose an LLC energy-saving scheme for high-performance, many-core processors. It partitions the data within the cache into shared and private regions. Applications only access the ways containing the type of data that they require, realising dynamic energy savings. Any ways that are not within the shared or private regions can be turned off to save static energy.

KW - cache partitioning, energy-efficient cache, llc management

U2 - 10.1145/2370816.2370898

DO - 10.1145/2370816.2370898

M3 - Conference contribution

T3 - PACT '12

SP - 465

EP - 466

BT - Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques

PB - ACM

CY - New York, NY, USA

ER -

Energy-efficient Cache Partitioning for Future CMPs

Abstract

Publication series

Keywords / Materials (for Non-textual outputs)

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Cite this