Evaluating and Optimizing OpenCL Kernels for High Performance Computing with FPGAs

Hamid Reza Zohouri; Naoya Maruyama; Aaron Smith; Motohiko Matsuda; Satoshi Matsuoka

doi:10.1109/SC.2016.34

Evaluating and Optimizing OpenCL Kernels for High Performance Computing with FPGAs

Hamid Reza Zohouri, Naoya Maruyama, Aaron Smith, Motohiko Matsuda, Satoshi Matsuoka

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We evaluate the power and performance of the Rodinia benchmark suite using the Altera SDK for OpenCL targeting a Stratix V FPGA against a modern CPU and GPU. We study multiple OpenCL kernels per benchmark, ranging from direct ports of the original GPU implementations to loop-pipelined kernels specifically optimized for FPGAs. Based on our results, we find that even though OpenCL is functionally portable across devices, direct ports of GPU-optimized code do not perform well compared to kernels optimized with FPGA-specific techniques such as sliding windows. However, by exploiting FPGA-specific optimizations, it is possible to achieve up to 3.4x better power efficiency using an Altera Stratix V FPGA in comparison to an NVIDIA K20c GPU, and better run time and power efficiency in comparison to CPU. We also present preliminary results for Arria 10, which, due to hardened FPUs, exhibits noticeably better performance compared to Stratix V in floating-point-intensive benchmarks.

Original language	English
Title of host publication	Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis
Place of Publication	Piscataway, NJ, USA
Publisher	Institute of Electrical and Electronics Engineers
Pages	409-420
Number of pages	12
ISBN (Electronic)	978-1-4673-8815-3
ISBN (Print)	978-1-4673-8816-0
DOIs	https://doi.org/10.1109/SC.2016.34
Publication status	Published - 16 Mar 2017
Event	Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis 2016 - Salt Lake City, United States Duration: 13 Nov 2016 → 18 Nov 2016 http://sc16.supercomputing.org/

Publication series

Name	SC '16
Publisher	IEEE Press
ISSN (Electronic)	2167-4337

Conference

Conference	Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis 2016
Abbreviated title	SC 2016
Country/Territory	United States
City	Salt Lake City
Period	13/11/16 → 18/11/16
Internet address	http://sc16.supercomputing.org/

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10.1109/SC.2016.34Licence: All Rights Reserved

https://ieeexplore.ieee.org/document/7877113

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Zohouri, H. R., Maruyama, N., Smith, A., Matsuda, M., & Matsuoka, S. (2017). Evaluating and Optimizing OpenCL Kernels for High Performance Computing with FPGAs. In Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (pp. 409-420). (SC '16). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/SC.2016.34

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title = "Evaluating and Optimizing OpenCL Kernels for High Performance Computing with FPGAs",

abstract = "We evaluate the power and performance of the Rodinia benchmark suite using the Altera SDK for OpenCL targeting a Stratix V FPGA against a modern CPU and GPU. We study multiple OpenCL kernels per benchmark, ranging from direct ports of the original GPU implementations to loop-pipelined kernels specifically optimized for FPGAs. Based on our results, we find that even though OpenCL is functionally portable across devices, direct ports of GPU-optimized code do not perform well compared to kernels optimized with FPGA-specific techniques such as sliding windows. However, by exploiting FPGA-specific optimizations, it is possible to achieve up to 3.4x better power efficiency using an Altera Stratix V FPGA in comparison to an NVIDIA K20c GPU, and better run time and power efficiency in comparison to CPU. We also present preliminary results for Arria 10, which, due to hardened FPUs, exhibits noticeably better performance compared to Stratix V in floating-point-intensive benchmarks.",

author = "Zohouri, {Hamid Reza} and Naoya Maruyama and Aaron Smith and Motohiko Matsuda and Satoshi Matsuoka",

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Zohouri, HR, Maruyama, N, Smith, A, Matsuda, M & Matsuoka, S 2017, Evaluating and Optimizing OpenCL Kernels for High Performance Computing with FPGAs. in Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis. SC '16, Institute of Electrical and Electronics Engineers, Piscataway, NJ, USA, pp. 409-420, Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis 2016, Salt Lake City, Utah, United States, 13/11/16. https://doi.org/10.1109/SC.2016.34

Evaluating and Optimizing OpenCL Kernels for High Performance Computing with FPGAs. / Zohouri, Hamid Reza; Maruyama, Naoya; Smith, Aaron et al.
Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis. Piscataway, NJ, USA: Institute of Electrical and Electronics Engineers, 2017. p. 409-420 (SC '16).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - Evaluating and Optimizing OpenCL Kernels for High Performance Computing with FPGAs

AU - Zohouri, Hamid Reza

AU - Maruyama, Naoya

AU - Smith, Aaron

AU - Matsuda, Motohiko

AU - Matsuoka, Satoshi

PY - 2017/3/16

Y1 - 2017/3/16

N2 - We evaluate the power and performance of the Rodinia benchmark suite using the Altera SDK for OpenCL targeting a Stratix V FPGA against a modern CPU and GPU. We study multiple OpenCL kernels per benchmark, ranging from direct ports of the original GPU implementations to loop-pipelined kernels specifically optimized for FPGAs. Based on our results, we find that even though OpenCL is functionally portable across devices, direct ports of GPU-optimized code do not perform well compared to kernels optimized with FPGA-specific techniques such as sliding windows. However, by exploiting FPGA-specific optimizations, it is possible to achieve up to 3.4x better power efficiency using an Altera Stratix V FPGA in comparison to an NVIDIA K20c GPU, and better run time and power efficiency in comparison to CPU. We also present preliminary results for Arria 10, which, due to hardened FPUs, exhibits noticeably better performance compared to Stratix V in floating-point-intensive benchmarks.

AB - We evaluate the power and performance of the Rodinia benchmark suite using the Altera SDK for OpenCL targeting a Stratix V FPGA against a modern CPU and GPU. We study multiple OpenCL kernels per benchmark, ranging from direct ports of the original GPU implementations to loop-pipelined kernels specifically optimized for FPGAs. Based on our results, we find that even though OpenCL is functionally portable across devices, direct ports of GPU-optimized code do not perform well compared to kernels optimized with FPGA-specific techniques such as sliding windows. However, by exploiting FPGA-specific optimizations, it is possible to achieve up to 3.4x better power efficiency using an Altera Stratix V FPGA in comparison to an NVIDIA K20c GPU, and better run time and power efficiency in comparison to CPU. We also present preliminary results for Arria 10, which, due to hardened FPUs, exhibits noticeably better performance compared to Stratix V in floating-point-intensive benchmarks.

U2 - 10.1109/SC.2016.34

DO - 10.1109/SC.2016.34

M3 - Conference contribution

SN - 978-1-4673-8816-0

T3 - SC '16

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EP - 420

BT - Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis

PB - Institute of Electrical and Electronics Engineers

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Zohouri HR, Maruyama N, Smith A, Matsuda M, Matsuoka S. Evaluating and Optimizing OpenCL Kernels for High Performance Computing with FPGAs. In Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis. Piscataway, NJ, USA: Institute of Electrical and Electronics Engineers. 2017. p. 409-420. (SC '16). Epub 2016 Nov 13. doi: 10.1109/SC.2016.34

Evaluating and Optimizing OpenCL Kernels for High Performance Computing with FPGAs

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