Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches

G. Yalcin; E. Islek; O. Tozlu; P. Reviriego; A. Cristal; O. S. Unsal; O. Ergin

doi:10.1109/IOLTS.2014.6873660

Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches

G. Yalcin, E. Islek, O. Tozlu, P. Reviriego, A. Cristal, O. S. Unsal, O. Ergin

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Scaling supply voltage to near-threshold is a very effective approach in reducing the energy consumption of computer systems. However, executing below the safe operation margin of supply voltage introduces high number of persistent failures, especially in memory structures. Thus, it is essential to provide reliability schemes to tolerate these persistent failures in the memory structures. In this study, we adopt a Single Error Correction Multiple Adjacent Error Correction (SEC-MAEC) code in order to minimize the energy consumption of L1 caches. In our evaluations, we present that the SEC-MAEC code is a fast and energy efficient Error Correcting Code (ECC). It presents 10X less area overhead and 2X less latency for the decoder compared to Orthogonal Latin Square Code, the state-of-the art ECC utilized in the L1 cache under the scaling supply voltage.

Original language	English
Title of host publication	On-Line Testing Symposium (IOLTS), 2014 IEEE 20th International
Publisher	Institute of Electrical and Electronics Engineers
Pages	1-6
Number of pages	6
DOIs	https://doi.org/10.1109/IOLTS.2014.6873660
Publication status	Published - 1 Jul 2014

Access to Document

10.1109/IOLTS.2014.6873660

http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=6873660

Cite this

@inproceedings{db934263ff6d47b999c4134676d7043a,

title = "Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches",

abstract = "Scaling supply voltage to near-threshold is a very effective approach in reducing the energy consumption of computer systems. However, executing below the safe operation margin of supply voltage introduces high number of persistent failures, especially in memory structures. Thus, it is essential to provide reliability schemes to tolerate these persistent failures in the memory structures. In this study, we adopt a Single Error Correction Multiple Adjacent Error Correction (SEC-MAEC) code in order to minimize the energy consumption of L1 caches. In our evaluations, we present that the SEC-MAEC code is a fast and energy efficient Error Correcting Code (ECC). It presents 10X less area overhead and 2X less latency for the decoder compared to Orthogonal Latin Square Code, the state-of-the art ECC utilized in the L1 cache under the scaling supply voltage.",

author = "G. Yalcin and E. Islek and O. Tozlu and P. Reviriego and A. Cristal and Unsal, {O. S.} and O. Ergin",

year = "2014",

month = jul,

day = "1",

doi = "10.1109/IOLTS.2014.6873660",

language = "English",

pages = "1--6",

booktitle = "On-Line Testing Symposium (IOLTS), 2014 IEEE 20th International",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

TY - GEN

T1 - Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches

AU - Yalcin, G.

AU - Islek, E.

AU - Tozlu, O.

AU - Reviriego, P.

AU - Cristal, A.

AU - Unsal, O. S.

AU - Ergin, O.

PY - 2014/7/1

Y1 - 2014/7/1

N2 - Scaling supply voltage to near-threshold is a very effective approach in reducing the energy consumption of computer systems. However, executing below the safe operation margin of supply voltage introduces high number of persistent failures, especially in memory structures. Thus, it is essential to provide reliability schemes to tolerate these persistent failures in the memory structures. In this study, we adopt a Single Error Correction Multiple Adjacent Error Correction (SEC-MAEC) code in order to minimize the energy consumption of L1 caches. In our evaluations, we present that the SEC-MAEC code is a fast and energy efficient Error Correcting Code (ECC). It presents 10X less area overhead and 2X less latency for the decoder compared to Orthogonal Latin Square Code, the state-of-the art ECC utilized in the L1 cache under the scaling supply voltage.

AB - Scaling supply voltage to near-threshold is a very effective approach in reducing the energy consumption of computer systems. However, executing below the safe operation margin of supply voltage introduces high number of persistent failures, especially in memory structures. Thus, it is essential to provide reliability schemes to tolerate these persistent failures in the memory structures. In this study, we adopt a Single Error Correction Multiple Adjacent Error Correction (SEC-MAEC) code in order to minimize the energy consumption of L1 caches. In our evaluations, we present that the SEC-MAEC code is a fast and energy efficient Error Correcting Code (ECC). It presents 10X less area overhead and 2X less latency for the decoder compared to Orthogonal Latin Square Code, the state-of-the art ECC utilized in the L1 cache under the scaling supply voltage.

U2 - 10.1109/IOLTS.2014.6873660

DO - 10.1109/IOLTS.2014.6873660

M3 - Conference contribution

SP - 1

EP - 6

BT - On-Line Testing Symposium (IOLTS), 2014 IEEE 20th International

PB - Institute of Electrical and Electronics Engineers

ER -

Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches

Abstract

Access to Document

Fingerprint

Cite this