Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches

G. Yalcin, E. Islek, O. Tozlu, P. Reviriego, A. Cristal, O. S. Unsal, O. Ergin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Scaling supply voltage to near-threshold is a very effective approach in reducing the energy consumption of computer systems. However, executing below the safe operation margin of supply voltage introduces high number of persistent failures, especially in memory structures. Thus, it is essential to provide reliability schemes to tolerate these persistent failures in the memory structures. In this study, we adopt a Single Error Correction Multiple Adjacent Error Correction (SEC-MAEC) code in order to minimize the energy consumption of L1 caches. In our evaluations, we present that the SEC-MAEC code is a fast and energy efficient Error Correcting Code (ECC). It presents 10X less area overhead and 2X less latency for the decoder compared to Orthogonal Latin Square Code, the state-of-the art ECC utilized in the L1 cache under the scaling supply voltage.
Original languageEnglish
Title of host publicationOn-Line Testing Symposium (IOLTS), 2014 IEEE 20th International
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages1-6
Number of pages6
DOIs
Publication statusPublished - 1 Jul 2014

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