Exploiting CMOS technology to enhance the performance of ISFET sensors

Themistoklis Prodromakis*, Yan Liu, Timothy Constandinou, Pantelis Georgiou, Chris Toumazou

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract / Description of output

This letter presents a novel method for fabricating ion-sensitive field-effect transistor (ISFET) devices in unmodified CMOS technologies. Conventional CMOS ISFETs utilize the protective passivation coating as the sensing membrane, with the sensed potential being coupled down to the floating MOS gate via a stack of conducting and insulating layers. The proposed structure minimizes the use of these layers by exploiting the passivation-opening mask, normally intended for bond-pad openings. Parasitic effects such as reduced transconductance and trapped charge within the floating gate structure are minimized, resulting in a lower VT and improved chemical transconductance efficiency. Other characteristics, including chemical sensitivity, reference leakage current, and noise power, are at comparable levels with conventional CMOS-based ISFET devices.

Original languageEnglish
Article number5512597
Pages (from-to)1053-1055
Number of pages3
JournalIEEE Electron Device Letters
Volume31
Issue number9
DOIs
Publication statusPublished - 19 Jul 2010

Keywords / Materials (for Non-textual outputs)

  • CMOS
  • ion-sensitive field-effect transistor (ISFET)
  • passivation opening

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