Hardware errors, i.e. Soft and Permanent Errors,became a tremendously important problem in the micro architecture design as technology scales deeply and the number of transistors placed in computer systems increases exponentially.Moreover, single particle strikes may flip the values of several adjacent bits which causes multi-bit upsets. The register file is one of the most vulnerable structure in microprocessors since it is the major data holding component and referenced by most of the other components. Nevertheless, any access latency of register file will affect the rest of the pipeline which makes register file a time critical component. Thus, it is essential to provide effective and fast reliability solutions to protect register files against hardware errors.In this study we present a fast error detection scheme in order to reduce the vulnerability of register file. We build our scheme on the observation that stack pointer is renamed repeatedly which causes keeping several copies of the same data in different registers. Thus, we leveraged these existing replicas for error detection. We show that our scheme can provide 59% reliability for the calculation of the Stack Pointer on average with a modest hardware overhead and with a negligible performance degradation.
|Title of host publication||5th Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'Finale)|
|Number of pages||6|
|Publication status||Published - Nov 2015|