Fast modulo 2n−1 and 2n;1 adder using carry-chain on FPGA

Laurent-Stéphane Didier, Luc Jaulmes

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract / Description of output

Modular addition is a widely used operation in Residue Number System applications. Specific sets of moduli allow fast RNS operations such as binary conversions and multiplications. Most of them use modulo 2n - 1 and 2n + 1 additions. This paper presents four fast and small architectures for these specific moduli targeting modern FPGAs with fast carry chains. The use of this arithmetic dedicated feature allows fast and small modular adders. Our modulo 2n - 1 adders have a single zero representation. Our modulo 2n+1 adders are designed for binary and diminished-one representation with and without zero value management.
Original languageEnglish
Title of host publication2013 Asilomar Conference on Signals, Systems and Computers
EditorsMichael B. Matthews
PublisherIEEE
Pages1155-1159
Number of pages5
ISBN (Electronic)978-1-4799-2390-8, 978-1-4799-2388-5
DOIs
Publication statusPublished - 8 May 2014
Event2013 Asilomar Conference on Signals, Systems, and Computers - Pacific Grove, United States
Duration: 3 Nov 20136 Nov 2013

Publication series

NameAsilomar Conference on Signals, Systems & Computers
PublisherIEEE
ISSN (Electronic)1058-6393

Conference

Conference2013 Asilomar Conference on Signals, Systems, and Computers
Abbreviated titleAsilomar 2013
Country/TerritoryUnited States
CityPacific Grove
Period3/11/136/11/13

Keywords / Materials (for Non-textual outputs)

  • Modular adder
  • carry-chain
  • FPGA
  • RNS
  • 2n−1 and 2n + 1 moduli

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