HieraGen: Automated Generation of Concurrent, Hierarchical Cache Coherence Protocols

Nicolai Oswald, Vijay Nagarajan, Daniel J. Sorin

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

We present HieraGen, a new tool for automatically generating hierarchical cache coherence protocols. HieraGen’s inputs are the simple, atomic, stable state protocols for each level of the hierarchy. HieraGen’s output is a highly concurrent hierarchical protocol, in the form of the finite state machines for all of the cache and directory controllers. HieraGen thus reduces the complexity that architects face, by off loadingthe challenging tasks of composing protocols and managing concurrency. Experiments show that HieraGen can automatically generate correct-by-construction MOESI family of hierarchical protocols with dozens of states and hundreds of transitions. We have verified all of the generated protocols for safety and deadlock freedom using a model checker.
Original languageEnglish
Title of host publication 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages888-899
Number of pages12
ISBN (Electronic)978-1-7281-4661-4
ISBN (Print)978-1-7281-4662-1
DOIs
Publication statusPublished - 13 Jul 2020
EventThe 47th International Symposium on Computer Architecture - Valencia, Spain
Duration: 30 May 20203 Jun 2020
Conference number: 47
https://iscaconf.org/isca2020/

Symposium

SymposiumThe 47th International Symposium on Computer Architecture
Abbreviated titleISCA 2020
CountrySpain
CityValencia
Period30/05/203/06/20
Internet address

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