High Performance Phylogenetic Analysis with Maximum Parsimony on Reconfigurable Hardware

S. Kasap, Khaled Benkrid

Research output: Contribution to journalArticlepeer-review

Abstract / Description of output

We present in this paper the detailed field-programmable gate-array (FPGA) design of the Maximum Parsimony method for molecular-based phylogenetic analysis and its implementation on the nodes of an FPGA supercomputer called Maxwell. This is the first FPGA implementation of this method for nucleotide sequence data reported in the literature. The hardware architecture consists in a linear systolic array composed of 20 processing elements each of which performing Sankoff's algorithm for a different tree topology in parallel. This array computes the scores of all theoretically possible trees for a given number of taxa in several iterations. The currently supported maximum number of taxa is 12 but this number can be easily increased. Furthermore, the resulting implementation outperforms an equivalent desktop-based software implementation (using phylogenetic analysis using parsimony software) by several orders of magnitude. The speed-up values achieved by the hardware implementation on a single node of the Maxwell machine can reach up to four orders of magnitude for the 12-taxa case while implementations on several Maxwell nodes can yield even higher speed-ups. This is achieved through harnessing both coarse-grain and fine-grain parallelism available in the algorithm and corresponding hardware implementation platform.
Original languageEnglish
Pages (from-to)796-808
Number of pages13
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Issue number5
Publication statusPublished - May 2011

Keywords / Materials (for Non-textual outputs)

  • Field-programmable gate array (FPGA)
  • high performance computing
  • maximum parsimony
  • phylogenetic analysis
  • reconfigurable hardware


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