High Speed CPU Simulation using LTU Dynamic Binary Translation

D. Jones, N.P. Topham

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In order to increase the speed of dynamic binary translation based simulators we consider the translation of large translation units consisting of multiple blocks. In contrast to other simulators, which translate hot blocks or pages, the techniques presented in this paper profile the target program’s execution path at runtime. The identification of hot paths ensures that only executed code is translated whilst at the same time offering greater scope for optimization. Mean performance figures for the functional simulation of EEMBC benchmarks show the new simulation techniques to be at least 63% faster than basic block based dynamic binary translation.
Original languageEnglish
Title of host publication4th International Conference on High Performance Embedded Architectures and Compilers (HiPEAC)
PublisherSpringer Berlin Heidelberg
Pages50-64
Number of pages15
ISBN (Electronic)978-3-540-92990-1
ISBN (Print)978-3-540-92989-5
DOIs
Publication statusPublished - 2009

Publication series

NameLecture Notes in Computer Science
PublisherSpringer Berlin Heidelberg

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